From: Finn Thain <fthain@linux-m68k.org>
To: "Mark Cave-Ayland" <mark.cave-ayland@ilande.co.uk>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>
Cc: jasowang@redhat.com, qemu-devel@nongnu.org, laurent@vivier.eu
Subject: Re: [PATCH 1/4] dp8393x: don't force 32-bit register access
Date: Thu, 8 Jul 2021 10:52:22 +1000 (AEST) [thread overview]
Message-ID: <f21cfe37-872-67a6-983a-65664214aaf0@linux-m68k.org> (raw)
In-Reply-To: <7b74db54-6afd-d20c-bd10-85bb6c3621cc@ilande.co.uk>
On Wed, 7 Jul 2021, Mark Cave-Ayland wrote:
> However this conflicts with what you mention above that the SONIC is
> hard-coded into little-endian mode, in which case we would still need to
> keep it.
>
If you want to fully implement BMODE in QEMU then you'll need to abandon
native endiannes for the device implementation. I was not proposing this
as it implies more byte swapping.
In a real Magnum the SONIC chip is connected to a bus that's not modelled
by QEMU. It follows that BMODE serves different purposes than big_endian.
I pointed out several semantic differences between BMODE and big_endian,
but I think the most significant of those was that endianness is already a
property of the memory device being accessed for DMA. Yet big_endian is a
property of the dp8393x device.
> Certainly we can look to improve things in the future, but without
> anyone having a working big-endian MIPS image to test against, I don't
> think it's worth guessing what changes are required as we can easily
> double the length of this thread and still have no idea if any changes
> we've made are correct.
>
That argument can be applied to other patches in this series also.
Anyway, if we agree that the aim is ultimately to remove the big_endian
flag then patch 4/4 should probably be re-evaluated in light of that.
next prev parent reply other threads:[~2021-07-08 0:54 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-07-05 21:49 [PATCH 0/4] dp8393x: fixes and improvements Mark Cave-Ayland
2021-07-05 21:49 ` [PATCH 1/4] dp8393x: don't force 32-bit register access Mark Cave-Ayland
2021-07-06 17:18 ` Philippe Mathieu-Daudé
2021-07-06 19:22 ` Mark Cave-Ayland
2021-07-06 21:00 ` Philippe Mathieu-Daudé
2021-07-06 23:51 ` Finn Thain
2021-07-07 10:02 ` Mark Cave-Ayland
2021-07-08 0:52 ` Finn Thain [this message]
2021-07-08 8:50 ` Mark Cave-Ayland
2021-07-05 21:49 ` [PATCH 2/4] dp8393x: Replace address_space_rw(is_write=1) by address_space_write() Mark Cave-Ayland
2021-07-05 21:49 ` [PATCH 3/4] dp8393x: Store CAM registers as 16-bit Mark Cave-Ayland
2021-07-06 23:48 ` Finn Thain
2021-07-07 9:08 ` Mark Cave-Ayland
2021-07-07 21:57 ` Philippe Mathieu-Daudé
2021-07-05 21:49 ` [PATCH 4/4] dp8393x: Rewrite dp8393x_get() / dp8393x_put() Mark Cave-Ayland
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