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Wed, 7 Jul 2021 20:52:25 -0400 (EDT) Date: Thu, 8 Jul 2021 10:52:22 +1000 (AEST) From: Finn Thain To: Mark Cave-Ayland , =?UTF-8?Q?Philippe_Mathieu-Daud=C3=A9?= Subject: Re: [PATCH 1/4] dp8393x: don't force 32-bit register access In-Reply-To: <7b74db54-6afd-d20c-bd10-85bb6c3621cc@ilande.co.uk> Message-ID: References: <20210705214929.17222-1-mark.cave-ayland@ilande.co.uk> <20210705214929.17222-2-mark.cave-ayland@ilande.co.uk> <49104070-ee40-3bcf-f043-225f247a1de7@linux-m68k.org> <7b74db54-6afd-d20c-bd10-85bb6c3621cc@ilande.co.uk> MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Received-SPF: none client-ip=64.147.123.25; envelope-from=fthain@linux-m68k.org; helo=wout2-smtp.messagingengine.com X-Spam_score_int: -25 X-Spam_score: -2.6 X-Spam_bar: -- X-Spam_report: (-2.6 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_PASS=-0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: jasowang@redhat.com, qemu-devel@nongnu.org, laurent@vivier.eu Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On Wed, 7 Jul 2021, Mark Cave-Ayland wrote: > However this conflicts with what you mention above that the SONIC is > hard-coded into little-endian mode, in which case we would still need to > keep it. > If you want to fully implement BMODE in QEMU then you'll need to abandon native endiannes for the device implementation. I was not proposing this as it implies more byte swapping. In a real Magnum the SONIC chip is connected to a bus that's not modelled by QEMU. It follows that BMODE serves different purposes than big_endian. I pointed out several semantic differences between BMODE and big_endian, but I think the most significant of those was that endianness is already a property of the memory device being accessed for DMA. Yet big_endian is a property of the dp8393x device. > Certainly we can look to improve things in the future, but without > anyone having a working big-endian MIPS image to test against, I don't > think it's worth guessing what changes are required as we can easily > double the length of this thread and still have no idea if any changes > we've made are correct. > That argument can be applied to other patches in this series also. Anyway, if we agree that the aim is ultimately to remove the big_endian flag then patch 4/4 should probably be re-evaluated in light of that.