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[92.192.135.113]) by smtp.gmail.com with ESMTPSA id g20-20020a05600c4ed400b00412f679bae1sm15369536wmq.26.2024.03.11.04.32.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Mar 2024 04:32:04 -0700 (PDT) Message-ID: Subject: Re: [PATCH v3 0/5] Generate x86 cpu features From: Tim Wiederhake To: "Daniel P." =?ISO-8859-1?Q?Berrang=E9?= Cc: qemu-devel@nongnu.org, Igor Mammedov , Philippe =?ISO-8859-1?Q?Mathieu-Daud=E9?= , Paolo Bonzini , "Michael S . Tsirkin" Date: Mon, 11 Mar 2024 12:32:03 +0100 In-Reply-To: References: <20240206134739.15345-1-twiederh@redhat.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.50.2 (3.50.2-1.fc39) MIME-Version: 1.0 Received-SPF: pass client-ip=170.10.133.124; envelope-from=twiederh@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -30 X-Spam_score: -3.1 X-Spam_bar: --- X-Spam_report: (-3.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1.029, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org On Tue, 2024-03-05 at 14:17 +0000, Daniel P. Berrang=C3=A9 wrote: > > On Tue, Feb 06, 2024 at 02:47:34PM +0100, Tim Wiederhake wrote: > > > > Synchronizing the list of cpu features and models with qemu is > > > > a > > > > recurring > > > > task in libvirt. For x86, this is done by reading > > > > qom-list-properties for > > > > max-x86_64-cpu and manually filtering out everthing that does > > > > not > > > > look like > > > > a feature name, as well as parsing target/i386/cpu.c for cpu > > > > models. > > > >=20 > > > > This is a flawed, tedious and error-prone procedure. Ideally, > > > > qemu > > > > and libvirt would query a common source for cpu feature and > > > > model > > > > related information. Meanwhile, converting this information > > > > into an > > > > easier > > > > to parse format would help libvirt a lot. > > > >=20 > > > > This patch series converts the cpu feature information present > > > > in > > > > target/i386/cpu.c (`feature_word_info`) into a yaml file and > > > > adds a > > > > script to generate the c code from this data. > >=20 > > Looking at this fresh, I'm left wondering why I didn't suggested > > using 'QMP' to expose this information when reviewing the earlier > > versions. I see Igor did indeed suggest this: > >=20 > > =C2=A0=20 > > https://lists.nongnu.org/archive/html/qemu-devel/2023-09/msg03905.html > >=20 > > Your commentry that "qom-list-properties" doesn't distinguish > > between CPU features and other random QOM properties is bang > > on the money. > >=20 > > I think what this highlights, is that 'qom-list-properties' > > is a very poor design/fit for the problem that management apps > > need to solve in this regard. > >=20 > > Libvirt should not need to manually exclude non-feature properties > > like 'check' 'enforce' 'migratable' etc. > >=20 > > QEMU already has this knowledge, as IIUC, 'query-cpu-model- > > expansion' > > can distinguish this: > >=20 > > query-cpu-model-expansion type=3Dstatic model=3D{'name':'Nehalem'} > > { > > =C2=A0=C2=A0=C2=A0 "return": { > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "model": { > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "nam= e": "base", > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 "pro= ps": { > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 "3dnow": false, > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 ...snip... > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2= =A0=C2=A0=C2=A0=C2=A0 "xtpr": false > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } > > =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } > > =C2=A0=C2=A0=C2=A0 } > > } > >=20 > > We still have the problem that we're not exposing the CPUID/MSR > > leafs/register bits. So query-cpu-model-expansion isn't a fit > > for the problem. > >=20 > > Rather than try to design something super general purpose, I'd > > suggest we take a short cut and design something entirley x86 > > specific, and simply mark the QMP command as "unstable" > > eg a 'x-query-x86-cpu-model-features', and then basically > > report all the information libvirt needs there. > >=20 > > This is functionally equivalent to what you expose in the YAML > > file, while still using QEMU's formal 'QMP' API mechanism, so > > we avoid inventing a new API concept via YAML. > >=20 > > I think this would avoid need to have a code generator refactor > > the CPU definitions too. We just need to expose the values of > > the existing CPUID_xxx constants against each register. > >=20 > >=20 > >=20 > > With regards, > > Daniel Thank you for your feedback. I do not see the patches and your proposed x-query-x86-cpu-model- features QMP command being mutually exclusive. In fact, I'd advocate for merging this patches still, as they provide a solution (albeit not through QMP) already whereas the QMP command would still need to be written. Additionally, there are more benefits to the generate-code approach, as the code generator can be extended to also generate the feature bits "#define CPUID_* (1U << ...)" in cpu.h, removing one more source of errors. And with the generated `feature_word_info` structure being virtually identical to the current version, I see no downsides: If the generator does become obsolete in the future, simply remove the python script and the yaml file, and all that is left is the original feature_word_info code, but better formatted. Regards, Tim