From: Yi Liu <yi.l.liu@intel.com>
To: Zhenzhong Duan <zhenzhong.duan@intel.com>, <qemu-devel@nongnu.org>
Cc: <mst@redhat.com>, <jasowang@redhat.com>, <peterx@redhat.com>,
<clement.mathieu--drif@eviden.com>
Subject: Re: [PATCH v2 1/3] intel_iommu: Handle PASID cache invalidation
Date: Thu, 16 Oct 2025 20:17:26 +0800 [thread overview]
Message-ID: <f3a3bf0a-e002-4ef2-a8c8-43df511a7f3b@intel.com> (raw)
In-Reply-To: <20251016074544.377637-2-zhenzhong.duan@intel.com>
On 2025/10/16 15:45, Zhenzhong Duan wrote:
> Adds an new entry VTDPASIDCacheEntry in VTDAddressSpace to cache the pasid
> entry and track PASID usage and future PASID tagged DMA address translation
> support in vIOMMU.
>
> When guest triggers pasid cache invalidation, QEMU will capture it and
> update or invalidate pasid cache.
>
> vIOMMU emulator could figure out the reason by fetching latest guest pasid
> entry in memory and compare it with cached PASID entry if it's valid.
>
> Signed-off-by: Yi Liu <yi.l.liu@intel.com>
> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Reviewed-by: Yi Liu <yi.l.liu@intel.com>
next prev parent reply other threads:[~2025-10-16 12:11 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-16 7:45 [PATCH v2 0/3] Fix DMA failure when there is domain switch in guest Zhenzhong Duan
2025-10-16 7:45 ` [PATCH v2 1/3] intel_iommu: Handle PASID cache invalidation Zhenzhong Duan
2025-10-16 12:17 ` Yi Liu [this message]
2025-10-16 7:45 ` [PATCH v2 2/3] intel_iommu: Reset pasid cache when system level reset Zhenzhong Duan
2025-10-16 12:18 ` Yi Liu
2025-10-17 2:30 ` Duan, Zhenzhong
2025-10-16 7:45 ` [PATCH v2 3/3] intel_iommu: Fix DMA failure when guest switches IOMMU domain Zhenzhong Duan
2025-10-16 12:18 ` Yi Liu
2025-10-17 5:52 ` Duan, Zhenzhong
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