From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from eggs.gnu.org ([2001:4830:134:3::10]:37356) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bfmtT-0004R0-LX for qemu-devel@nongnu.org; Fri, 02 Sep 2016 07:44:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1bfmtP-0001IG-GI for qemu-devel@nongnu.org; Fri, 02 Sep 2016 07:44:22 -0400 Received: from mo68.mail-out.ovh.net ([178.32.228.68]:45168) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1bfmtP-0001I9-AV for qemu-devel@nongnu.org; Fri, 02 Sep 2016 07:44:19 -0400 Received: from player695.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo68.mail-out.ovh.net (Postfix) with ESMTP id D4DA4FF9B02 for ; Fri, 2 Sep 2016 13:44:17 +0200 (CEST) References: <1472797976-24210-1-git-send-email-nikunj@linux.vnet.ibm.com> <095712f7-2724-1c55-e531-d4d089dfee06@redhat.com> From: =?UTF-8?Q?C=c3=a9dric_Le_Goater?= Message-ID: Date: Fri, 2 Sep 2016 13:44:08 +0200 MIME-Version: 1.0 In-Reply-To: <095712f7-2724-1c55-e531-d4d089dfee06@redhat.com> Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable Subject: Re: [Qemu-devel] [PATCH RFC 0/4] Enable MTTCG on PowerPC List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Thomas Huth , Nikunj A Dadhania , qemu-ppc@nongnu.org, alex.bennee@linaro.org, david@gibson.dropbear.id.au, rth@twiddle.net Cc: qemu-devel@nongnu.org On 09/02/2016 09:57 AM, Thomas Huth wrote: > On 02.09.2016 08:43, C=C3=A9dric Le Goater wrote: >> On 09/02/2016 08:32 AM, Nikunj A Dadhania wrote: >>> The series is a first attempt at enabling Multi-Threaded TCG on Power= PC. >>> Changes that were needed to enable PowerPC are pretty simple; >>> >>> Patch 01: Take a iothread lock during hcall, as hcall can generate io= requests >>> 02: For TCG, we were harcoding smt as 1, this gets rid of the l= imitation >>> 03: Use atomic_cmpxchg in store conditional >>> 04: With more threads, flush the entry from each cpu.=20 >>> This can be optimized further. >>> >>> The patches are based on the Alex Bennee's base enabling patches for=20 >>> MTTCG[1] and Emilios's cmpxchg atomics. The consolidated tree of the=20 >>> above patches is here: >>> >>> https://github.com/stsquad/qemu/tree/mttcg/base-patches-v4-with-cmpxc= hg-atomics-v2 >>> >>> Apart from the above, PPC patches are based out of ppc-for-2.8 and=20 >>> load/store consolidation patches [2] >>> >>> Series with all dependent patches available here:=20 >>> https://github.com/nikunjad/qemu/tree/ppc_mttcg_v1 >>> >>> Testing:=20 >>> =3D=3D=3D=3D=3D=3D=3D=3D >>> >>> -smp 4,cores=3D1,threads=3D4 -accel tcg,thread=3Dmulti >>> >>> TODO >>> =3D=3D=3D=3D >>> Implement msgsndp instructions(door-bell), newer kernels enable it=20 >>> depending on the PVR. I have been using following workaround to boot. >>> https://github.com/nikunjad/qemu/commit/2c10052c5f93418a6b920e6ba3ce1= 813fcf50bc4 >> >> You could also introduce a Power8 DD1 in qemu. From the kernel cputabl= e : >> >> { /* Power8 DD1: Does not support doorbell IPIs */ >> .pvr_mask =3D 0xffffff00, >> .pvr_value =3D 0x004d0100, >> .cpu_name =3D "POWER8 (raw)", >> .cpu_features =3D CPU_FTRS_POWER8_DD1, >> ... >=20 > Please try to avoid that! We just got rid of DD1 in qemu a couple of > months ago: >=20 > http://git.qemu.org/?p=3Dqemu.git;a=3Dcommitdiff;h=3D9d6ba75df26d699a6 he. I missed that. So the suggestion is a bit unfortunate.=20 Thanks, C.