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[50.233.235.3]) by smtp.gmail.com with ESMTPSA id w12-20020a17090aea0c00b001d9e3b0e10fsm8906088pjy.16.2022.05.07.04.13.17 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 07 May 2022 04:13:18 -0700 (PDT) Message-ID: Date: Sat, 7 May 2022 06:13:14 -0500 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.8.0 Subject: Re: [PULL v2 00/18] target/xtensa updates for v7.1 Content-Language: en-US To: Max Filippov , qemu-devel@nongnu.org Cc: Peter Maydell References: <20220506224331.3886707-1-jcmvbkbc@gmail.com> From: Richard Henderson In-Reply-To: <20220506224331.3886707-1-jcmvbkbc@gmail.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit Received-SPF: pass client-ip=2607:f8b0:4864:20::52e; envelope-from=richard.henderson@linaro.org; helo=mail-pg1-x52e.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, NICE_REPLY_A=-0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+qemu-devel=archiver.kernel.org@nongnu.org Sender: "Qemu-devel" On 5/6/22 17:43, Max Filippov wrote: > Hello, > > please pull the following updates for the target/xtensa. > > Changes since v1: > - rebase series to the current master > - drop big-endian tests enabling patch (cannot test it because of the > test infrastructure change) > - add cache testing opcodes patch > > The following changes since commit 31abf61c4929a91275fe32f1fafe6e6b3e840b2a: > > Merge tag 'pull-ppc-20220505' of https://gitlab.com/danielhb/qemu into staging (2022-05-05 13:52:22 -0500) > > are available in the Git repository at: > > https://github.com/OSLL/qemu-xtensa.git tags/20220506-xtensa-1 > > for you to fetch changes up to 59491e97f89eaeee275f57fb6bb40f0152429fb3: > > target/xtensa: implement cache test option opcodes (2022-05-06 15:37:10 -0700) > > ---------------------------------------------------------------- > target/xtensa updates for v7.1: > > - expand test coverage to MMUv3, cores without windowed registers or > loop option; > - import lx106 core (used in the esp8266 IoT chips); > - use tcg_constant_* in the front end; > - add clock input to the xtensa CPU; > - fix reset state of the xtensa MX PIC; > - implement cache testing opcodes. Applied, thanks. Please update https://wiki.qemu.org/ChangeLog/7.1 as appropriate. r~ > > ---------------------------------------------------------------- > Max Filippov (17): > target/xtensa: fix missing tcg_temp_free in gen_window_check > target/xtensa: use tcg_contatnt_* for numeric literals > target/xtensa: use tcg_constant_* for exceptions > target/xtensa: use tcg_constant_* for TLB opcodes > target/xtensa: use tcg_constant_* for numbered special registers > target/xtensa: use tcg_constant_* for FPU conversion opcodes > target/xtensa: use tcg_constant_* for remaining opcodes > target/xtensa: add clock input to xtensa CPU > hw/xtensa: fix reset value of MIROUT register of MX PIC > tests/tcg/xtensa: fix build for cores without windowed registers > tests/tcg/xtensa: restore vecbase SR after test > tests/tcg/xtensa: fix watchpoint test > tests/tcg/xtensa: remove dependency on the loop option > tests/tcg/xtensa: enable autorefill phys_mem tests for MMUv3 > tests/tcg/xtensa: enable mmu tests for MMUv3 > tests/tcg/xtensa: fix vectors and checks in timer test > target/xtensa: implement cache test option opcodes > > Simon Safar (1): > target/xtensa: import core lx106 > > hw/xtensa/mx_pic.c | 2 +- > target/xtensa/core-lx106.c | 51 + > target/xtensa/core-lx106/core-isa.h | 470 ++ > target/xtensa/core-lx106/gdb-config.c.inc | 83 + > target/xtensa/core-lx106/xtensa-modules.c.inc | 7668 +++++++++++++++++++++++++ > target/xtensa/cores.list | 1 + > target/xtensa/cpu.c | 15 + > target/xtensa/cpu.h | 5 + > target/xtensa/op_helper.c | 7 +- > target/xtensa/translate.c | 211 +- > tests/tcg/xtensa/crt.S | 2 + > tests/tcg/xtensa/test_break.S | 86 +- > tests/tcg/xtensa/test_mmu.S | 182 +- > tests/tcg/xtensa/test_phys_mem.S | 10 +- > tests/tcg/xtensa/test_sr.S | 2 + > tests/tcg/xtensa/test_timer.S | 68 +- > 16 files changed, 8604 insertions(+), 259 deletions(-) > create mode 100644 target/xtensa/core-lx106.c > create mode 100644 target/xtensa/core-lx106/core-isa.h > create mode 100644 target/xtensa/core-lx106/gdb-config.c.inc > create mode 100644 target/xtensa/core-lx106/xtensa-modules.c.inc >