* [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression)
@ 2007-05-04 20:12 Stefan Weil
2007-05-04 20:27 ` Paul Brook
2007-05-04 20:27 ` Blue Swirl
0 siblings, 2 replies; 4+ messages in thread
From: Stefan Weil @ 2007-05-04 20:12 UTC (permalink / raw)
To: QEMU Developers
Resetting a MIPS cpu currently does not work, because important
entries in env (CPUMIPSState) are filled with 0 at the
beginning of function cpu_reset.
At system start, these values are set in cpu_mips_register.
After reset, env->nb_tlb == 0 results in a division by zero
crash of QEMU.
We can either re-arrange the entries in CPUMIPSState
(move those which must not be zero'ed to the end), or
cpu_reset must call cpu_mips_register.
Which solution is better?
Stefan
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression)
2007-05-04 20:12 [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression) Stefan Weil
@ 2007-05-04 20:27 ` Paul Brook
2007-05-04 20:44 ` Stefan Weil
2007-05-04 20:27 ` Blue Swirl
1 sibling, 1 reply; 4+ messages in thread
From: Paul Brook @ 2007-05-04 20:27 UTC (permalink / raw)
To: qemu-devel
> We can either re-arrange the entries in CPUMIPSState
> (move those which must not be zero'ed to the end), or
> cpu_reset must call cpu_mips_register.
>
> Which solution is better?
ARM uses the latter solution.
IMHO it's better to do that than try and extend the hacks were some fields are
left untouched by a reset.
Paul
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression)
2007-05-04 20:12 [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression) Stefan Weil
2007-05-04 20:27 ` Paul Brook
@ 2007-05-04 20:27 ` Blue Swirl
1 sibling, 0 replies; 4+ messages in thread
From: Blue Swirl @ 2007-05-04 20:27 UTC (permalink / raw)
To: qemu-devel
On 5/4/07, Stefan Weil <weil@mail.berlios.de> wrote:
> Resetting a MIPS cpu currently does not work, because important
> entries in env (CPUMIPSState) are filled with 0 at the
> beginning of function cpu_reset.
>
> At system start, these values are set in cpu_mips_register.
>
> After reset, env->nb_tlb == 0 results in a division by zero
> crash of QEMU.
>
> We can either re-arrange the entries in CPUMIPSState
> (move those which must not be zero'ed to the end), or
> cpu_reset must call cpu_mips_register.
>
> Which solution is better?
I solved the same issue on Sparc side by not zeroing most of the
state. This is in line with the real Sparc hardware.
^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression)
2007-05-04 20:27 ` Paul Brook
@ 2007-05-04 20:44 ` Stefan Weil
0 siblings, 0 replies; 4+ messages in thread
From: Stefan Weil @ 2007-05-04 20:44 UTC (permalink / raw)
To: QEMU Developers
Paul Brook schrieb:
>> We can either re-arrange the entries in CPUMIPSState
>> (move those which must not be zero'ed to the end), or
>> cpu_reset must call cpu_mips_register.
>>
>> Which solution is better?
>
> ARM uses the latter solution.
> IMHO it's better to do that than try and extend the hacks were some
> fields are
> left untouched by a reset.
>
> Paul
>
I had just implemented this 2nd solution. It was not sufficient
because env->irq was also zero'ed, so Linux starts after
reset without the MIPS timer interrupt which is not good :-).
Re-arranging env->irq is not a nice solution but it helped.
Stefan
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2007-05-04 20:51 UTC | newest]
Thread overview: 4+ messages (download: mbox.gz follow: Atom feed
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2007-05-04 20:12 [Qemu-devel] [BUG] QEMU crash during cpu reset (MIPS regression) Stefan Weil
2007-05-04 20:27 ` Paul Brook
2007-05-04 20:44 ` Stefan Weil
2007-05-04 20:27 ` Blue Swirl
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