Re: [Qemu-devel] [PATCH] sparc32 boot mode flag fix

["Blue Swirl" <blauwirbel@gmail.com>]

On 11/6/07, Paul Brook <paul@codesourcery.com> wrote:
> > > This patch also removes the MMU flags from being saved in the
> > > translation block code as a result of an off line discussion with Paul
> > > Brook.
> >
> > I'd like to hear the reasoning behind that. The TBs generated while in
> > boot mode and MMU disabled may contain translations generated from
> > virtual to physical mappings that do not exist when the mode is
> > changed. Boot mode and MMU disable are not used after boot and these
> > bits don't affect translation, so those bits may be less important and
> > not worth the few bits in TB flags.
>
> It think you're confusing the TB cache with the TLB. Each TB is already
> indexed by both physical and virtual address (explicitly in tb_find_slow, and
> implicitly in tb_find_fast because a tlb flush clears env->tb_jmp_cache).
>
> IIUC enabling/disabling boot mode is no different to and other VM change. If
> the virtual->physical mapping happens to be the same then it's perfectly ok
> to reuse the TB.

Not in this case: in boot mode, physical and virtual address 0
generates TBs from PROM code. When control transfers to OS in normal
MMU mode, virtual and physical address 0 generates TBs from code in
RAM.

> The TLB is already flushed whenever the MMU mode is changes. There is no need
> to invalidate the TB.

The TB is valid, but only when the boot mode bit is the same as
recorded in the TB flags.