On 2/23/08, Fabrice Bellard <fabrice@bellard.org> wrote:
> Blue Swirl wrote:
>  > The attached patch enables most TCG ops for Qemu Sparc32/64 target.
>  > Sparc32 softmmu and linux-user are OK, but Sparc64 and Sparc32plus
>  > targets do not work.
>  >
>  > Comments?
>  >
>  > It would be nice to get rid of T2 usage in std (also stda and
>  > casa/casxa) but I don't know how to pass a 64-bit value from legacy op
>  > to TCG stores and loads on a 32-bit target and host.
>
> [...]
>
>  Also don't forget that T2 is used in CPU restore state to handle delay
>  slots. This part of the SPARC target is tricky and should be simplified.

I just got rid of other T2 accesses.

>  Another point is that you should define TCG globals for each SPARC GPR.
>  It was not done for i386 because I feared performance regressions when
>  accessing to 16 bit or 8 bit sub-registers. On SPARC you do not have
>  this issue.

Nice idea. Would this also work for windowed registers?

>  Regarding the generic "xxx_tl" defines, I did not move it into TCG
>  because I wanted TCG to be target independent. Since it is no longer the
>  case because of the target memory access instructions, I think it is a
>  good idea now. But do not mix the target specific defines with target
>  independent defines (in tcg-op.h there is a specific section for target
>  specific defines).

Ok, I'll move them there.

Here's my current version. Sparc32 is still OK and Sparc32plus
helloworld executes.