From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1Jfyzu-0002gW-5p for qemu-devel@nongnu.org; Sun, 30 Mar 2008 10:59:02 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1Jfyzr-0002fX-Nn for qemu-devel@nongnu.org; Sun, 30 Mar 2008 10:59:01 -0400 Received: from [199.232.76.173] (helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1Jfyzr-0002fM-B9 for qemu-devel@nongnu.org; Sun, 30 Mar 2008 10:58:59 -0400 Received: from mu-out-0910.google.com ([209.85.134.184]) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1Jfyzq-0003TO-Do for qemu-devel@nongnu.org; Sun, 30 Mar 2008 10:58:59 -0400 Received: by mu-out-0910.google.com with SMTP id w8so1790193mue.4 for ; Sun, 30 Mar 2008 07:58:53 -0700 (PDT) Message-ID: Date: Sun, 30 Mar 2008 17:58:53 +0300 From: "Blue Swirl" Subject: Re: [Qemu-devel] [PATCH 2/6] PCI DMA API In-Reply-To: <47EFA769.7090201@us.ibm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1206827760-4566-1-git-send-email-aliguori@us.ibm.com> <1206827760-4566-2-git-send-email-aliguori@us.ibm.com> <47EFA769.7090201@us.ibm.com> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: kvm-devel@lists.sourceforge.net, Marcelo Tosatti , qemu-devel@nongnu.org, Aurelien Jarno On 3/30/08, Anthony Liguori wrote: > Blue Swirl wrote: > > On 3/30/08, Anthony Liguori wrote: > > > >> This patch introduces a PCI DMA API and some generic code to support other DMA > >> APIs. Two types are introduced: PhysIOVector and IOVector. A DMA API > >> maps a PhysIOVector, which is composed of target_phys_addr_t, into an IOVector, > >> which is composed of void *. > >> > > > > This looks like it wouldn't scale to handle the Sparc systems. There > > we want to make more translation steps from DVMA addresses to physical > > in DMA controller and IOMMU and only in the final stage to void *. To > > handle this, probably there should be an opaque parameter and some way > > to register the translation function. Otherwise the API looks OK. > > > > > I think having the PCI DMA API translate PhysIOVector => PhysIOVector > would help. Then it becomes pretty easy to just call the DMA controller > for additional translation from the IOMMU. > > Does that sound right? I don't quite understand what role the opaque > parameter would serve. Devices should not need to know about the underlying buses, so they can be used in different systems. So the translators just call recursively next ones until we get physical memory. I would use the opaque parameter as a pointer to each translator's own state structures. But if you can implement this without the parameter, great!