Index: qemu/hw/pc.c
===================================================================
--- qemu.orig/hw/pc.c	2008-07-30 16:58:03.000000000 +0000
+++ qemu/hw/pc.c	2008-07-30 17:24:01.000000000 +0000
@@ -32,6 +32,7 @@
 #include "smbus.h"
 #include "boards.h"
 #include "console.h"
+#include "firmware_abi.h"
 
 /* output Bochs bios info messages */
 //#define DEBUG_BIOS
@@ -41,6 +42,8 @@
 #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
 
 #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
+#define PC_CFG_ROM_ADDR 0xf0000000
+#define PC_CFG_ROM_SIZE 4096
 
 /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables.  */
 #define ACPI_DATA_SIZE       0x10000
@@ -712,6 +715,55 @@
     nb_ne2k++;
 }
 
+static int pc_cfg_rom_set_params(ram_addr_t cfg_rom,
+                                 const char *arch,
+                                 ram_addr_t below_4g_mem_size,
+                                 ram_addr_t above_4g_mem_size,
+                                 const char *boot_devices)
+{
+    uint32_t start;
+    uint8_t image[PC_CFG_ROM_SIZE];
+    ohwcfg_v3_t *header = (ohwcfg_v3_t *)&image;
+    struct pc_arch_cfg *pc_header;
+    extern int nographic;
+
+    memset(image, '\0', sizeof(image));
+
+    // Try to match PPC NVRAM
+    strcpy((char *)header->struct_ident, "QEMU_BIOS");
+    header->struct_version = cpu_to_le32(3); /* structure v3 */
+
+    header->nvram_arch_ptr = cpu_to_le16(sizeof(ohwcfg_v3_t));
+    header->nvram_arch_size = cpu_to_le16(sizeof(struct pc_arch_cfg));
+    strcpy((char *)header->arch, arch);
+    header->nb_cpus = smp_cpus & 0xff;
+    header->RAM0_base = 0;
+    header->RAM0_size = cpu_to_le64((uint64_t)below_4g_mem_size);
+    if (above_4g_mem_size) {
+        header->RAM1_base = 0x100000000ULL;
+        header->RAM1_size = cpu_to_le64((uint64_t)above_4g_mem_size);
+    }
+    strcpy((char *)header->boot_devices, boot_devices);
+    header->nboot_devices = strlen(boot_devices) & 0xff;
+
+    if (nographic)
+        header->graphic_flags = cpu_to_le16(OHW_GF_NOGRAPHICS);
+
+    strncpy((char *)header->uuid, "QEMUQEMUQEMUQEMU", 16);
+
+    header->crc = cpu_to_le16(OHW_compute_crc(header, 0x00, 0xF8));
+
+    // Architecture specific header
+    start = sizeof(ohwcfg_v3_t);
+    pc_header = (struct pc_arch_cfg *)&image[start];
+    pc_header->valid = 1;
+    start += sizeof(struct pc_arch_cfg);
+
+    cpu_physical_memory_write_rom(cfg_rom, image, sizeof(image));
+
+    return 0;
+}
+
 /* PC hardware initialisation */
 static void pc_init1(ram_addr_t ram_size, int vga_ram_size,
                      const char *boot_device, DisplayState *ds,
@@ -723,6 +775,7 @@
     int ret, linux_boot, i;
     ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset;
     ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
+    ram_addr_t cfg_rom_offset;
     int bios_size, isa_bios_size, vga_bios_size;
     PCIBus *pci_bus;
     int piix3_devfn = -1;
@@ -867,6 +920,14 @@
     cpu_register_physical_memory((uint32_t)(-bios_size),
                                  bios_size, bios_offset | IO_MEM_ROM);
 
+    /* map configuration ROM */
+    cfg_rom_offset = qemu_ram_alloc(PC_CFG_ROM_SIZE);
+    cpu_register_physical_memory(PC_CFG_ROM_ADDR, PC_CFG_ROM_SIZE,
+                                 cfg_rom_offset | IO_MEM_ROM);
+    pc_cfg_rom_set_params(PC_CFG_ROM_ADDR, pci_enabled? "pc" : "isapc",
+                          below_4g_mem_size, above_4g_mem_size,
+                          boot_device);
+
     bochs_bios_init();
 
     if (linux_boot)
Index: qemu/hw/firmware_abi.h
===================================================================
--- qemu.orig/hw/firmware_abi.h	2008-07-30 16:57:53.000000000 +0000
+++ qemu/hw/firmware_abi.h	2008-07-30 17:22:12.000000000 +0000
@@ -54,8 +54,10 @@
     uint8_t  pad3[5];
     /* 0xD0: boot devices                            */
     uint8_t  boot_devices[0x10];
-    /* 0xE0                                          */
-    uint8_t  pad4[0x1C]; /* 28 */
+    /* 0xE0: UUID                                    */
+    uint8_t  uuid[0x10];
+    /* 0xF0                                          */
+    uint8_t  pad4[0xC]; /* 12 */
     /* 0xFC: checksum                                */
     uint16_t crc;
     uint8_t  pad5[0x02];
@@ -176,6 +178,12 @@
     header->checksum = tmp;
 }
 
+/* PC configuration structure */
+struct pc_arch_cfg {
+    uint8_t valid;
+    uint8_t unused[63];
+};
+
 #else /* __ASSEMBLY__ */
 
 /* Structure offsets for asm use */
Index: qemu/hw/sun4m.c
===================================================================
--- qemu.orig/hw/sun4m.c	2008-07-30 17:24:14.000000000 +0000
+++ qemu/hw/sun4m.c	2008-07-30 17:24:56.000000000 +0000
@@ -213,6 +213,8 @@
     if (nographic)
         header->graphic_flags = cpu_to_be16(OHW_GF_NOGRAPHICS);
 
+    strncpy((char *)header->uuid, "QEMUQEMUQEMUQEMU", 16);
+
     header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8));
 
     // Architecture specific header
Index: qemu/hw/sun4u.c
===================================================================
--- qemu.orig/hw/sun4u.c	2008-07-30 17:24:16.000000000 +0000
+++ qemu/hw/sun4u.c	2008-07-30 17:24:33.000000000 +0000
@@ -144,6 +144,8 @@
     if (nographic)
         header->graphic_flags = cpu_to_be16(OHW_GF_NOGRAPHICS);
 
+    strncpy((char *)header->uuid, "QEMUQEMUQEMUQEMU", 16);
+
     header->crc = cpu_to_be16(OHW_compute_crc(header, 0x00, 0xF8));
 
     // Architecture specific header
