From: "Blue Swirl" <blauwirbel@gmail.com>
To: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [5120] SH4: Convert remaining non-fp ops to TCG
Date: Mon, 1 Sep 2008 17:34:34 +0300 [thread overview]
Message-ID: <f43fc5580809010734nfd8be3fq76f0c0053d08db33@mail.gmail.com> (raw)
In-Reply-To: <E1Ka99W-0002he-PC@cvs.savannah.gnu.org>
On 9/1/08, Aurelien Jarno <aurelien@aurel32.net> wrote:
> -void OPPROTO op_cmp_str_T0_T1(void)
> -{
> - cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) ||
> - (T0 & 0x0000ff00) == (T1 & 0x0000ff00) ||
> - (T0 & 0x00ff0000) == (T1 & 0x00ff0000) ||
> - (T0 & 0xff000000) == (T1 & 0xff000000));
> - RETURN();
> -}
The above version uses both T0 and T1, but the version below only cpu_T[0].
> + int label1 = gen_new_label();
> + int label2 = gen_new_label();
> + tcg_gen_xor_i32(cpu_T[0], cpu_gregs[REG(B7_4)], cpu_gregs[REG(B11_8)]);
> + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0xff000000);
> + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1);
> + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0x00ff0000);
> + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1);
> + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0x0000ff00);
> + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1);
> + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0x000000ff);
> + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1);
> + tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T);
> + tcg_gen_br(label2);
> + gen_set_label(label1);
> + tcg_gen_ori_i32(cpu_sr, cpu_sr, SR_T);
> + gen_set_label(label2);
next prev parent reply other threads:[~2008-09-01 14:34 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-09-01 13:09 [Qemu-devel] [5120] SH4: Convert remaining non-fp ops to TCG Aurelien Jarno
2008-09-01 14:34 ` Blue Swirl [this message]
2008-09-01 15:25 ` Aurelien Jarno
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