From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KaAUJ-0001il-9D for qemu-devel@nongnu.org; Mon, 01 Sep 2008 10:34:39 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KaAUG-0001hC-UY for qemu-devel@nongnu.org; Mon, 01 Sep 2008 10:34:38 -0400 Received: from [199.232.76.173] (port=52725 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KaAUG-0001gw-Mb for qemu-devel@nongnu.org; Mon, 01 Sep 2008 10:34:36 -0400 Received: from wf-out-1314.google.com ([209.85.200.172]:33839) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KaAUG-0006mb-Lw for qemu-devel@nongnu.org; Mon, 01 Sep 2008 10:34:36 -0400 Received: by wf-out-1314.google.com with SMTP id 27so1895451wfd.4 for ; Mon, 01 Sep 2008 07:34:35 -0700 (PDT) Message-ID: Date: Mon, 1 Sep 2008 17:34:34 +0300 From: "Blue Swirl" Subject: Re: [Qemu-devel] [5120] SH4: Convert remaining non-fp ops to TCG In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 9/1/08, Aurelien Jarno wrote: > -void OPPROTO op_cmp_str_T0_T1(void) > -{ > - cond_t((T0 & 0x000000ff) == (T1 & 0x000000ff) || > - (T0 & 0x0000ff00) == (T1 & 0x0000ff00) || > - (T0 & 0x00ff0000) == (T1 & 0x00ff0000) || > - (T0 & 0xff000000) == (T1 & 0xff000000)); > - RETURN(); > -} The above version uses both T0 and T1, but the version below only cpu_T[0]. > + int label1 = gen_new_label(); > + int label2 = gen_new_label(); > + tcg_gen_xor_i32(cpu_T[0], cpu_gregs[REG(B7_4)], cpu_gregs[REG(B11_8)]); > + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0xff000000); > + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1); > + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0x00ff0000); > + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1); > + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0x0000ff00); > + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1); > + tcg_gen_andi_i32(cpu_T[0], cpu_T[0], 0x000000ff); > + tcg_gen_brcondi_i32(TCG_COND_EQ, cpu_T[0], 0, label1); > + tcg_gen_andi_i32(cpu_sr, cpu_sr, ~SR_T); > + tcg_gen_br(label2); > + gen_set_label(label1); > + tcg_gen_ori_i32(cpu_sr, cpu_sr, SR_T); > + gen_set_label(label2);