Re: [Qemu-devel] sparc smul problem

["Blue Swirl" <blauwirbel@gmail.com>]

On 9/1/08, Vince Weaver <vince@csl.cornell.edu> wrote:
> Hello!
>
>  I've been stuck on this all weekend, as I can't find where the actual
> problem is. I might be completely missing it, but I've tried a lot of things
> and can't make it work.
>
>  On SPARC, the "smul" instruction multiplies two numbers, puts the result in
> the result register but also puts the top 32-bits of the 64-bit result into
> the "Y" register.
>
>  As the attached code shows, the value of "Y" is wrong.  Somehow after the
> multiply, the top 32 bits of the product rae all zeros.  I've played around
> with the code generated by translate.c, and it looks like the shift and
> other instructions all work properly, but the 64-bit multiply the result is
> somehow being truncated.  But I've looked at the generated code (on x86_64)
> and it looks like it is doing the right thing.
>
>  So anyway, I'll have to take a look at this again later, but in case anyone
> else wants to look at it in case I am missing anything obvious.

At least the store and load do not match:
 ---- 0x10084
 mov_i64 tmp16,g1
 mov_i64 tmp17,g4
 mul_i64 tmp17,tmp16,tmp17
 movi_i64 tmp18,$0x20
 shr_i64 tmp16,tmp17,tmp18
 st_i32 tmp16,env,$0x58
^^^^^
 mov_i64 loc3,tmp17
 mov_i64 g2,loc3

 ---- 0x10088
 ld_i64 tmp0,env,$0x58
^^^^^
mov_i64 g3,tmp0