From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KaCaZ-0006yX-Fn for qemu-devel@nongnu.org; Mon, 01 Sep 2008 12:49:15 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KaCaX-0006xH-31 for qemu-devel@nongnu.org; Mon, 01 Sep 2008 12:49:14 -0400 Received: from [199.232.76.173] (port=56388 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KaCaW-0006x3-DN for qemu-devel@nongnu.org; Mon, 01 Sep 2008 12:49:12 -0400 Received: from wf-out-1314.google.com ([209.85.200.168]:55583) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KaCaV-0007TF-W7 for qemu-devel@nongnu.org; Mon, 01 Sep 2008 12:49:12 -0400 Received: by wf-out-1314.google.com with SMTP id 27so1939333wfd.4 for ; Mon, 01 Sep 2008 09:49:10 -0700 (PDT) Message-ID: Date: Mon, 1 Sep 2008 19:49:10 +0300 From: "Blue Swirl" Subject: Re: [Qemu-devel] sparc smul problem In-Reply-To: <20080901121035.R83237@stanley.csl.cornell.edu> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20080901121035.R83237@stanley.csl.cornell.edu> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 9/1/08, Vince Weaver wrote: > Hello! > > I've been stuck on this all weekend, as I can't find where the actual > problem is. I might be completely missing it, but I've tried a lot of things > and can't make it work. > > On SPARC, the "smul" instruction multiplies two numbers, puts the result in > the result register but also puts the top 32-bits of the 64-bit result into > the "Y" register. > > As the attached code shows, the value of "Y" is wrong. Somehow after the > multiply, the top 32 bits of the product rae all zeros. I've played around > with the code generated by translate.c, and it looks like the shift and > other instructions all work properly, but the 64-bit multiply the result is > somehow being truncated. But I've looked at the generated code (on x86_64) > and it looks like it is doing the right thing. > > So anyway, I'll have to take a look at this again later, but in case anyone > else wants to look at it in case I am missing anything obvious. At least the store and load do not match: ---- 0x10084 mov_i64 tmp16,g1 mov_i64 tmp17,g4 mul_i64 tmp17,tmp16,tmp17 movi_i64 tmp18,$0x20 shr_i64 tmp16,tmp17,tmp18 st_i32 tmp16,env,$0x58 ^^^^^ mov_i64 loc3,tmp17 mov_i64 g2,loc3 ---- 0x10088 ld_i64 tmp0,env,$0x58 ^^^^^ mov_i64 g3,tmp0