From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KaZDO-0002gd-8K for qemu-devel@nongnu.org; Tue, 02 Sep 2008 12:58:50 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KaZDN-0002g2-II for qemu-devel@nongnu.org; Tue, 02 Sep 2008 12:58:49 -0400 Received: from [199.232.76.173] (port=45650 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KaZDN-0002fw-73 for qemu-devel@nongnu.org; Tue, 02 Sep 2008 12:58:49 -0400 Received: from yx-out-1718.google.com ([74.125.44.156]:30250) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KaZDM-0007jn-E8 for qemu-devel@nongnu.org; Tue, 02 Sep 2008 12:58:49 -0400 Received: by yx-out-1718.google.com with SMTP id 3so1086424yxi.82 for ; Tue, 02 Sep 2008 09:58:46 -0700 (PDT) Message-ID: Date: Tue, 2 Sep 2008 19:58:46 +0300 From: "Blue Swirl" Subject: Re: [Qemu-devel] sparc smul problem In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <20080901121035.R83237@stanley.csl.cornell.edu> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org, Fabrice Bellard On 9/1/08, Blue Swirl wrote: > On 9/1/08, Vince Weaver wrote: > > > Hello! > > > > I've been stuck on this all weekend, as I can't find where the actual > > problem is. I might be completely missing it, but I've tried a lot of things > > and can't make it work. > > > > On SPARC, the "smul" instruction multiplies two numbers, puts the result in > > the result register but also puts the top 32-bits of the 64-bit result into > > the "Y" register. > > > > As the attached code shows, the value of "Y" is wrong. Somehow after the > > multiply, the top 32 bits of the product rae all zeros. I've played around > > with the code generated by translate.c, and it looks like the shift and > > other instructions all work properly, but the 64-bit multiply the result is > > somehow being truncated. But I've looked at the generated code (on x86_64) > > and it looks like it is doing the right thing. > > > > So anyway, I'll have to take a look at this again later, but in case anyone > > else wants to look at it in case I am missing anything obvious. > > > It looks like TCG on i386 host generates incorrect code for mulu2_i32, > I think the op should be imul (unsigned) instead of mul. This patch > fixes the problem. Never mind, I read the manuals wrong and the bug was elsewhere.