Re: [Qemu-devel] [PATCH 5/x] ppc: Convert op_load_gpr_{T0, T1, T2} to TCG

["Blue Swirl" <blauwirbel@gmail.com>]

On 9/3/08, Andreas Färber <andreas.faerber@web.de> wrote:
>
>  Am 03.09.2008 um 20:26 schrieb Blue Swirl:
>
>
> > On 9/3/08, Andreas Färber <andreas.faerber@web.de> wrote:
> >
> > > Here's what I've pieced together:
> > >
> > > - for ppc64 just use i64 op
> > > - for ppc on 32-bit host use 2x i32 move, w/ TCGV_HIGH and w/o
> > > - for ppc on 64-bit host use i32 move + i64 shift + i32 move
> > >
> > > static always_inline void gen_op_load_gpr64(TCGv t, int reg) {
> > > #if defined(TARGET_PPC64)
> > >  tcg_gen_mov_i64(t, cpu_gpr[reg]);
> > > #else
> > > #if TCG_TARGET_REG_BITS == 32
> > >  tcg_gen_mov_i32(TCGV_HIGH(t), cpu_gprh[reg]);
> > > #else
> > >  tcg_gen_mov_i32(t, cpu_gprh[reg]);
> > >  tcg_gen_shli_i64(t, t, 32);
> > > #endif
> > >  tcg_gen_mov_i32(t, cpu_gpr[reg]);
> > > #endif
> > > }
> > >
> >
> > Can't you use extu_i32_i64 followed by shift and then or? I think you
> > should not use TCGV_HIGH outside tcg directory, it's an implementation
> > detail.
> >
>
>
>  Thanks for the suggestion! You mean like this?
>
>  static always_inline void gen_load_gpr64(TCGv t, int reg) {
>  #if defined(TARGET_PPC64)
>   tcg_gen_mov_i64(t, cpu_gpr[reg]);
>  #else
>   tcg_gen_extu_i32_i64(t, cpu_gprh[reg]);
>   tcg_gen_shli_i64(t, t, 32);
>   TCGv tmp = tcg_temp_local_new(TCG_TYPE_I64);
>   tcg_gen_extu_i32_i64(tmp, cpu_gpr[reg]);
>   tcg_gen_or_i64(t, t, tmp);
>   tcg_temp_free(tmp);
>  #endif
>  }
>
>  static always_inline void gen_store_gpr64(int reg, TCGv t) {
>  #if defined(TARGET_PPC64)
>   tcg_gen_mov_i64(cpu_gpr[reg], t);
>  #else
>   tcg_gen_trunc_i64_i32(cpu_gpr[reg], t);
>   TCGv tmp = tcg_temp_local_new(TCG_TYPE_I64);
>   tcg_gen_shri_i64(tmp, t, 32);
>   tcg_gen_trunc_i64_i32(cpu_gprh[reg], tmp);
>   tcg_temp_free(tmp);
>  #endif
>  }

Yes.