Index: qemu/tcg/tcg-op.h
===================================================================
--- qemu.orig/tcg/tcg-op.h	2008-10-29 19:17:10.000000000 +0000
+++ qemu/tcg/tcg-op.h	2008-10-29 19:17:12.000000000 +0000
@@ -169,14 +169,22 @@
     tcg_gen_op1i(INDEX_op_br, label);
 }
 
-static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg)
+static inline void tcg_gen_mov_i32_nocheck(TCGv ret, TCGv arg)
 {
     if (GET_TCGV(ret) != GET_TCGV(arg))
         tcg_gen_op2(INDEX_op_mov_i32, ret, arg);
 }
 
+static inline void tcg_gen_mov_i32(TCGv ret, TCGv arg)
+{
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg);
+    tcg_gen_mov_i32_nocheck(ret, arg);
+}
+
 static inline void tcg_gen_movi_i32(TCGv ret, int32_t arg)
 {
+    CHECK_TCGV_32(ret);
     tcg_gen_op2i(INDEX_op_movi_i32, ret, arg);
 }
 
@@ -357,11 +365,16 @@
 
 static inline void tcg_gen_add_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_add_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_addi_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     /* some cases can be optimized here */
     if (arg2 == 0) {
         tcg_gen_mov_i32(ret, arg1);
@@ -374,11 +387,16 @@
 
 static inline void tcg_gen_sub_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_sub_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_subi_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     /* some cases can be optimized here */
     if (arg2 == 0) {
         tcg_gen_mov_i32(ret, arg1);
@@ -391,11 +409,16 @@
 
 static inline void tcg_gen_and_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_and_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_andi_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     /* some cases can be optimized here */
     if (arg2 == 0) {
         tcg_gen_movi_i32(ret, 0);
@@ -410,11 +433,16 @@
 
 static inline void tcg_gen_or_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_or_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_ori_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     /* some cases can be optimized here */
     if (arg2 == 0xffffffff) {
         tcg_gen_movi_i32(ret, 0xffffffff);
@@ -429,11 +457,16 @@
 
 static inline void tcg_gen_xor_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_xor_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_xori_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     /* some cases can be optimized here */
     if (arg2 == 0) {
         tcg_gen_mov_i32(ret, arg1);
@@ -446,11 +479,16 @@
 
 static inline void tcg_gen_shl_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_shl_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_shli_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     if (arg2 == 0) {
         tcg_gen_mov_i32(ret, arg1);
     } else {
@@ -462,11 +500,16 @@
 
 static inline void tcg_gen_shr_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_shr_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_shri_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     if (arg2 == 0) {
         tcg_gen_mov_i32(ret, arg1);
     } else {
@@ -478,11 +521,16 @@
 
 static inline void tcg_gen_sar_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_sar_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_sari_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     if (arg2 == 0) {
         tcg_gen_mov_i32(ret, arg1);
     } else {
@@ -495,6 +543,8 @@
 static inline void tcg_gen_brcond_i32(int cond, TCGv arg1, TCGv arg2, 
                                       int label_index)
 {
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op4ii(INDEX_op_brcond_i32, arg1, arg2, cond, label_index);
 }
 
@@ -502,18 +552,24 @@
                                        int label_index)
 {
     TCGv t0 = tcg_const_i32(arg2);
+    CHECK_TCGV_32(arg1);
     tcg_gen_brcond_i32(cond, arg1, t0, label_index);
     tcg_temp_free(t0);
 }
 
 static inline void tcg_gen_mul_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_mul_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_muli_i32(TCGv ret, TCGv arg1, int32_t arg2)
 {
     TCGv t0 = tcg_const_i32(arg2);
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
     tcg_gen_mul_i32(ret, arg1, t0);
     tcg_temp_free(t0);
 }
@@ -521,27 +577,42 @@
 #ifdef TCG_TARGET_HAS_div_i32
 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_div_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_rem_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_divu_i32, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     tcg_gen_op3(INDEX_op_remu_i32, ret, arg1, arg2);
 }
 #else
 static inline void tcg_gen_div_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
     TCGv t0;
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     t0 = tcg_temp_new(TCG_TYPE_I32);
     tcg_gen_sari_i32(t0, arg1, 31);
     tcg_gen_op5(INDEX_op_div2_i32, ret, t0, arg1, t0, arg2);
@@ -551,6 +622,9 @@
 static inline void tcg_gen_rem_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
     TCGv t0;
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     t0 = tcg_temp_new(TCG_TYPE_I32);
     tcg_gen_sari_i32(t0, arg1, 31);
     tcg_gen_op5(INDEX_op_div2_i32, t0, ret, arg1, t0, arg2);
@@ -560,6 +634,9 @@
 static inline void tcg_gen_divu_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
     TCGv t0;
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     t0 = tcg_temp_new(TCG_TYPE_I32);
     tcg_gen_movi_i32(t0, 0);
     tcg_gen_op5(INDEX_op_divu2_i32, ret, t0, arg1, t0, arg2);
@@ -569,6 +646,9 @@
 static inline void tcg_gen_remu_i32(TCGv ret, TCGv arg1, TCGv arg2)
 {
     TCGv t0;
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_32(arg1);
+    CHECK_TCGV_32(arg2);
     t0 = tcg_temp_new(TCG_TYPE_I32);
     tcg_gen_movi_i32(t0, 0);
     tcg_gen_op5(INDEX_op_divu2_i32, t0, ret, arg1, t0, arg2);
@@ -699,12 +779,17 @@
     tcg_gen_and_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), TCGV_HIGH(arg2));
 }
 
-static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
+static inline void tcg_gen_andi_i64_nocheck(TCGv ret, TCGv arg1, int64_t arg2)
 {
     tcg_gen_andi_i32(ret, arg1, arg2);
     tcg_gen_andi_i32(TCGV_HIGH(ret), TCGV_HIGH(arg1), arg2 >> 32);
 }
 
+static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+    tcg_gen_andi_i64_nocheck(TCGv ret, TCGv arg1, int64_t arg2)
+}
+
 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
     tcg_gen_or_i32(ret, arg1, arg2);
@@ -819,12 +904,15 @@
 
 static inline void tcg_gen_mov_i64(TCGv ret, TCGv arg)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg);
     if (GET_TCGV(ret) != GET_TCGV(arg))
         tcg_gen_op2(INDEX_op_mov_i64, ret, arg);
 }
 
 static inline void tcg_gen_movi_i64(TCGv ret, int64_t arg)
 {
+    CHECK_TCGV_64(ret);
     tcg_gen_op2i(INDEX_op_movi_i64, ret, arg);
 }
 
@@ -894,71 +982,106 @@
 
 static inline void tcg_gen_add_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_add_i64, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_addi_i64(TCGv ret, TCGv arg1, int64_t arg2)
 {
     TCGv t0 = tcg_const_i64(arg2);
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
     tcg_gen_add_i64(ret, arg1, t0);
     tcg_temp_free(t0);
 }
 
 static inline void tcg_gen_sub_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_sub_i64, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_subi_i64(TCGv ret, TCGv arg1, int64_t arg2)
 {
     TCGv t0 = tcg_const_i64(arg2);
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
     tcg_gen_sub_i64(ret, arg1, t0);
     tcg_temp_free(t0);
 }
 
 static inline void tcg_gen_and_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_and_i64, ret, arg1, arg2);
 }
 
-static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
+static inline void tcg_gen_andi_i64_nocheck(TCGv ret, TCGv arg1, int64_t arg2)
 {
     TCGv t0 = tcg_const_i64(arg2);
     tcg_gen_and_i64(ret, arg1, t0);
     tcg_temp_free(t0);
 }
 
+static inline void tcg_gen_andi_i64(TCGv ret, TCGv arg1, int64_t arg2)
+{
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    tcg_gen_andi_i64_nocheck(ret, arg1, arg2);
+}
+
 static inline void tcg_gen_or_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_or_i64, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_ori_i64(TCGv ret, TCGv arg1, int64_t arg2)
 {
     TCGv t0 = tcg_const_i64(arg2);
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
     tcg_gen_or_i64(ret, arg1, t0);
     tcg_temp_free(t0);
 }
 
 static inline void tcg_gen_xor_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_xor_i64, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_xori_i64(TCGv ret, TCGv arg1, int64_t arg2)
 {
     TCGv t0 = tcg_const_i64(arg2);
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
     tcg_gen_xor_i64(ret, arg1, t0);
     tcg_temp_free(t0);
 }
 
 static inline void tcg_gen_shl_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_shl_i64, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_shli_i64(TCGv ret, TCGv arg1, int64_t arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
     if (arg2 == 0) {
         tcg_gen_mov_i64(ret, arg1);
     } else {
@@ -970,11 +1093,16 @@
 
 static inline void tcg_gen_shr_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_shr_i64, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_shri_i64(TCGv ret, TCGv arg1, int64_t arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
     if (arg2 == 0) {
         tcg_gen_mov_i64(ret, arg1);
     } else {
@@ -986,11 +1114,16 @@
 
 static inline void tcg_gen_sar_i64(TCGv ret, TCGv arg1, TCGv arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
+    CHECK_TCGV_64(arg2);
     tcg_gen_op3(INDEX_op_sar_i64, ret, arg1, arg2);
 }
 
 static inline void tcg_gen_sari_i64(TCGv ret, TCGv arg1, int64_t arg2)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_64(arg1);
     if (arg2 == 0) {
         tcg_gen_mov_i64(ret, arg1);
     } else {
@@ -1284,20 +1417,26 @@
    registers.  This will probably break MIPS64 targets.  */
 static inline void tcg_gen_trunc_i64_i32(TCGv ret, TCGv arg)
 {
-    tcg_gen_mov_i32(ret, arg);
+    CHECK_TCGV_32(ret);
+    CHECK_TCGV_64(arg);
+    tcg_gen_mov_i32_nocheck(ret, arg);
 }
 
 /* Note: we assume the target supports move between 32 and 64 bit
    registers */
 static inline void tcg_gen_extu_i32_i64(TCGv ret, TCGv arg)
 {
-    tcg_gen_andi_i64(ret, arg, 0xffffffffu);
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_32(arg);
+    tcg_gen_andi_i64_nocheck(ret, arg, 0xffffffffu);
 }
 
 /* Note: we assume the target supports move between 32 and 64 bit
    registers */
 static inline void tcg_gen_ext_i32_i64(TCGv ret, TCGv arg)
 {
+    CHECK_TCGV_64(ret);
+    CHECK_TCGV_32(arg);
     tcg_gen_ext32s_i64(ret, arg);
 }
 
Index: qemu/tcg/tcg.h
===================================================================
--- qemu.orig/tcg/tcg.h	2008-10-29 19:17:10.000000000 +0000
+++ qemu/tcg/tcg.h	2008-10-29 19:17:12.000000000 +0000
@@ -116,20 +116,39 @@
    Users of tcg_gen_* don't need to know about any of this, and should
    treat TCGv as an opaque type.  */
 
-//#define DEBUG_TCGV 1
+#define DEBUG_TCGV 1
 
 #ifdef DEBUG_TCGV
 
 typedef struct
 {
     int n;
+#if TCG_TARGET_REG_BITS == 64
+    int size;
+#endif
 } TCGv;
 
 #define MAKE_TCGV(i) __extension__ \
   ({ TCGv make_tcgv_tmp = {i}; make_tcgv_tmp;})
+#define MAKE_TCGV32(i) __extension__ \
+    ({ TCGv make_tcgv_tmp = {i, 32}; make_tcgv_tmp;})
+#define MAKE_TCGV64(i) __extension__ \
+    ({ TCGv make_tcgv_tmp = {i, 64}; make_tcgv_tmp;})
 #define GET_TCGV(t) ((t).n)
+#define tcg_check_abort(want, got)                                      \
+    do {                                                                \
+        fprintf(stderr, "%s:%d: tcg fatal error: bad TCGV size "        \
+                "(wanted %d != got %d)\n",                              \
+                __FILE__, __LINE__, want, got);                         \
+        abort();                                                        \
+    } while (0)
 #if TCG_TARGET_REG_BITS == 32
 #define TCGV_HIGH(t) MAKE_TCGV(GET_TCGV(t) + 1)
+#define CHECK_TCGV_32(t) do {} while(0)
+#define CHECK_TCGV_64(t) do {} while(0)
+#else
+#define CHECK_TCGV_32(t) do { if (t.size != 32) tcg_check_abort(32, t.size);} while(0)
+#define CHECK_TCGV_64(t) do { if (t.size != 64) tcg_check_abort(64, t.size);} while(0)
 #endif
 
 #else /* !DEBUG_TCGV */
@@ -140,6 +159,8 @@
 #if TCG_TARGET_REG_BITS == 32
 #define TCGV_HIGH(t) ((t) + 1)
 #endif
+#define CHECK_TCGV_32(t) do {} while(0)
+#define CHECK_TCGV_64(t) do {} while(0)
 
 #endif /* DEBUG_TCGV */
 
Index: qemu/tcg/tcg.c
===================================================================
--- qemu.orig/tcg/tcg.c	2008-10-29 19:17:10.000000000 +0000
+++ qemu/tcg/tcg.c	2008-10-29 19:17:12.000000000 +0000
@@ -289,7 +289,10 @@
     ts->name = name;
     s->nb_globals++;
     tcg_regset_set_reg(s->reserved_regs, reg);
-    return MAKE_TCGV(idx);
+    if (type == TCG_TYPE_I32)
+        return MAKE_TCGV32(idx);
+    else
+        return MAKE_TCGV64(idx);
 }
 
 #if TCG_TARGET_REG_BITS == 32
@@ -386,7 +389,10 @@
         ts->name = name;
         s->nb_globals++;
     }
-    return MAKE_TCGV(idx);
+    if (type == TCG_TYPE_I32)
+        return MAKE_TCGV32(idx);
+    else
+        return MAKE_TCGV64(idx);
 }
 
 TCGv tcg_temp_new_internal(TCGType type, int temp_local)
@@ -437,7 +443,10 @@
             s->nb_temps++;
         }
     }
-    return MAKE_TCGV(idx);
+    if (type == TCG_TYPE_I32)
+        return MAKE_TCGV32(idx);
+    else
+        return MAKE_TCGV64(idx);
 }
 
 void tcg_temp_free(TCGv arg)
