From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1KwWpO-0004Zz-Fz for qemu-devel@nongnu.org; Sun, 02 Nov 2008 01:52:50 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1KwWpL-0004Zj-ND for qemu-devel@nongnu.org; Sun, 02 Nov 2008 01:52:49 -0500 Received: from [199.232.76.173] (port=55017 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1KwWpL-0004Zg-IR for qemu-devel@nongnu.org; Sun, 02 Nov 2008 01:52:47 -0500 Received: from wf-out-1314.google.com ([209.85.200.170]:1871) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1KwWpK-0005DB-WE for qemu-devel@nongnu.org; Sun, 02 Nov 2008 01:52:47 -0500 Received: by wf-out-1314.google.com with SMTP id 27so1968283wfd.4 for ; Sat, 01 Nov 2008 23:52:45 -0700 (PDT) Message-ID: Date: Sun, 2 Nov 2008 08:52:45 +0200 From: "Blue Swirl" Subject: Re: [Qemu-devel] [PATCH] SM501 emulation for R2D-SH4 In-Reply-To: <490D0C8F.9010601@juno.dti.ne.jp> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <490D0C8F.9010601@juno.dti.ne.jp> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 11/2/08, Shin-ichiro KAWASAKI wrote: > Hi, all! > > This patch adds minimum emulation of SM501 multifunction device, > whose main feature is 2D graphics. It is one of the peripheral > of R2D, the SH4 evaluation board. We can see TUX printed on the > QEMU console. > +#define UART_RX_OFFSET 0x00 > +#define UART_TX_OFFSET 0x00 > +#define UART_IER_OFFSET 0x04 > +#define UART_IIR_OFFSET 0x08 > +#define UART_FCR_OFFSET 0x08 > +#define UART_LCR_OFFSET 0x0C > +#define UART_MCR_OFFSET 0x10 > +#define UART_LSR_OFFSET 0x14 > +#define UART_MSR_OFFSET 0x18 > +#define UART_SCR_OFFSET 0x1C Looks like standard 16550-like UART. Maybe you could use the version in serial.c and map that to this location? > +/* taken from "linux/drivers/mfd/sm501.c" */ > +static uint32_t sm501_mem_local_size[] = { "const"? > + if (SM501_DC + SM501_DC_PANEL_PALETTE <= offset > + && offset < SM501_DC + SM501_DC_VIDEO_PALETTE) { > + offset -= SM501_DC + SM501_DC_PANEL_PALETTE; > + /* TODO : consider BYTE/WORD access */ > + /* TODO : consider endian */ > + ret = *(uint32_t*)&s->dc_panel_palette[offset]; > + } else if (SM501_DC + SM501_DC_VIDEO_PALETTE <= offset > + && offset < SM501_DC + SM501_DC_CRT_PALETTE) { > + offset -= SM501_DC + SM501_DC_VIDEO_PALETTE; > + /* TODO : consider BYTE/WORD access */ > + /* TODO : consider endian */ > + ret = *(uint32_t*)&s->dc_video_palette[offset]; > + } else if (SM501_DC + SM501_DC_CRT_PALETTE <= offset > + && offset < SM501_DC + SM501_DC_CRT_PALETTE + 0x400) { > + offset -= SM501_DC + SM501_DC_CRT_PALETTE; > + /* TODO : consider BYTE/WORD access */ > + /* TODO : consider endian */ > + ret = *(uint32_t*)&s->dc_crt_palette[offset]; > + } else { The above should be cleaner and faster if you registered different access routines for each area. > +static uint32_t sm501_lm_read(void *opaque, target_phys_addr_t addr) > +{ > + SM501State * s = (SM501State *)opaque; > + uint32_t offset = addr - s->base; > + return *(uint32_t*)&s->local_mem[offset]; > +} It would be much faster to register normal RAM for this area and check for updated pages asynchronously using VGA_DIRTY_FLAG (see vga.c or tcx.c). > + /* allocate local memory */ > + s->local_mem = qemu_mallocz(get_local_mem_size(s)); The display buffer should be allocated using machine definition .ram_require.