From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LBDCu-0001Bn-W2 for qemu-devel@nongnu.org; Fri, 12 Dec 2008 13:57:49 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LBDCt-00019Q-RU for qemu-devel@nongnu.org; Fri, 12 Dec 2008 13:57:48 -0500 Received: from [199.232.76.173] (port=60600 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LBDCt-00019H-Ly for qemu-devel@nongnu.org; Fri, 12 Dec 2008 13:57:47 -0500 Received: from mail-bw0-f12.google.com ([209.85.218.12]:41960) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LBDCs-0006Ar-SW for qemu-devel@nongnu.org; Fri, 12 Dec 2008 13:57:47 -0500 Received: by bwz5 with SMTP id 5so2299597bwz.10 for ; Fri, 12 Dec 2008 10:57:44 -0800 (PST) Message-ID: Date: Fri, 12 Dec 2008 20:55:04 +0200 From: "Blue Swirl" Subject: Re: [Qemu-devel] [PATCH 4 of 5] dma api In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org Cc: chrisw@redhat.com, kvm@vger.kernel.org, avi@redhat.com, Gerd Hoffmann On 12/12/08, Andrea Arcangeli wrote: > From: Andrea Arcangeli > > One major limitation for KVM today is the lack of a proper way to write drivers > in a way that allows the host OS to use direct DMA to the guest physical memory > to avoid any intermediate copy. The only API provided to drivers seems to be > the cpu_physical_memory_rw and that enforces all drivers to bounce and trash > cpu caches and be memory bound. This new DMA API instead allows drivers to use > a pci_dma_sg method for SG I/O that will translate the guest physical addresses > to host virutal addresses and it will call two operation, one is a submit > method and one is the complete method. The pci_dma_sg may have to bounce buffer > internally and to limit the max bounce size it may have to submit I/O in pieces > with multiple submit calls. > > All we care about is the performance of the direct path, so I tried to > avoid dynamic allocations there to avoid entering glibc. > > Signed-off-by: Andrea Arcangeli > + * QEMU PCI DMA operations > +typedef struct QEMUPciDmaSgParam { > + QEMUPciDmaSgSubmit *pci_dma_sg_submit; > + QEMUPciDmaSgComplete *pci_dma_sg_complete; > + void *pci_dma_sg_opaque; > + QEMUPciDmaSg *sg; > + struct QEMUPciDmaSgParam *next; > +} QEMUPciDmaSgParam; Still "PCI" here and other places, why? Even the "pci_dev" should be bus_opaque for other buses. +/* pci_dma.c */ Here pci_ prefix is even incorrect given that the file is now dma.c.