From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LE00b-0000Yl-2d for qemu-devel@nongnu.org; Sat, 20 Dec 2008 06:28:37 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LE00Y-0000Wd-9j for qemu-devel@nongnu.org; Sat, 20 Dec 2008 06:28:35 -0500 Received: from [199.232.76.173] (port=60893 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LE00X-0000WS-UR for qemu-devel@nongnu.org; Sat, 20 Dec 2008 06:28:33 -0500 Received: from mail-bw0-f12.google.com ([209.85.218.12]:52171) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LE00W-0000UU-W4 for qemu-devel@nongnu.org; Sat, 20 Dec 2008 06:28:33 -0500 Received: by bwz5 with SMTP id 5so901139bwz.10 for ; Sat, 20 Dec 2008 03:28:30 -0800 (PST) Message-ID: Date: Sat, 20 Dec 2008 13:28:30 +0200 From: "Blue Swirl" Subject: Re: [Qemu-devel] [PATCH 5/6] hook cpu_register_physical_mem In-Reply-To: <494C096D.1050902@codemonkey.ws> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <1229619702-26315-1-git-send-email-glommer@redhat.com> <1229619702-26315-2-git-send-email-glommer@redhat.com> <1229619702-26315-3-git-send-email-glommer@redhat.com> <1229619702-26315-4-git-send-email-glommer@redhat.com> <1229619702-26315-5-git-send-email-glommer@redhat.com> <1229619702-26315-6-git-send-email-glommer@redhat.com> <494C096D.1050902@codemonkey.ws> Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Anthony Liguori Cc: stefano.stabellini@eu.citrix.com, Ian.Jackson@eu.citrix.com, qemu-devel@nongnu.org, kvm@vger.kernel.org, avi@redhat.com On 12/19/08, Anthony Liguori wrote: > Blue Swirl wrote: > > > On 12/18/08, Glauber Costa wrote: > > > > > > > Since now we have our own memory read/write function, we don't > > > depend on all of tcg data structures anymore. So, instead of filling > > > them up, bypass it altogether by using kvm_set_phys mem alone. > > > > > > To do that, we now have to provide our own way to get page > > > information given the address. (kvm_get_physical_page_desc) > > > > > > Signed-off-by: Glauber Costa > > > > > > > > > > > > > > > +static void > tcg_register_physical_memory_offset(target_phys_addr_t > start_addr, > > > > > > > > > > I don't think TCG actually has much to do with the function. > > > > It really does though. The way physical memory is registered and managed > is TCG specific right now. It has deep hooks for invalidating > TranslationBlock's, and the table structure is designed to be conducive to > the access patterns of TCG. Yes, but also dyngen stuff used the same structures, so it's a bit more generic than TCG-only. > If you think of a higher level CPU API, I think registering physical memory > and reading/writing physical memory would end up being part of that API. Thanks, I was looking for something like this. CPU emulator is more than just TCG or dyngen and it is also ~KVM. So how about cpu_emu_register_physical_memory_offset? Also noaccel_register_physical_memory_offset would fit.