* [Qemu-devel] [PATCH] better SuperSPARC emulation
@ 2008-12-23 14:41 Robert Reif
2008-12-23 15:07 ` Blue Swirl
0 siblings, 1 reply; 2+ messages in thread
From: Robert Reif @ 2008-12-23 14:41 UTC (permalink / raw)
To: qemu-devel
[-- Attachment #1: Type: text/plain, Size: 148 bytes --]
Add better SuperSPARC processor emulation.
With this patch, openboot is able to detect the SuperSPARC processor
revision and cache size properly.
[-- Attachment #2: supersparc.diff.txt --]
[-- Type: text/plain, Size: 4358 bytes --]
Index: target-sparc/helper.c
===================================================================
--- target-sparc/helper.c (revision 6121)
+++ target-sparc/helper.c (working copy)
@@ -688,6 +688,7 @@
#if !defined(TARGET_SPARC64)
env->mmuregs[0] |= def->mmu_version;
cpu_sparc_set_id(env, 0);
+ env->mxccregs[7] |= def->mxcc_version;
#else
env->mmu_version = def->mmu_version;
env->maxtl = def->maxtl;
@@ -972,19 +973,6 @@
CPU_FEATURE_FSMULD,
},
{
- .name = "TI SuperSparc II",
- .iu_version = 0x40000000,
- .fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
- .mmu_bm = 0x00002000,
- .mmu_ctpr_mask = 0xffffffc0,
- .mmu_cxr_mask = 0x0000ffff,
- .mmu_sfsr_mask = 0xffffffff,
- .mmu_trcr_mask = 0xffffffff,
- .nwindows = 8,
- .features = CPU_DEFAULT_FEATURES,
- },
- {
.name = "TI MicroSparc I",
.iu_version = 0x41000000,
.fpu_version = 4 << 17,
@@ -1027,9 +1015,9 @@
},
{
.name = "TI SuperSparc 40", // STP1020NPGA
- .iu_version = 0x41000000,
+ .iu_version = 0x41000000, // SuperSPARC 2.x
.fpu_version = 0 << 17,
- .mmu_version = 0x00000000,
+ .mmu_version = 0x00000800, // SuperSPARC 2.x, no MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
@@ -1040,9 +1028,9 @@
},
{
.name = "TI SuperSparc 50", // STP1020PGA
- .iu_version = 0x40000000,
+ .iu_version = 0x40000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
+ .mmu_version = 0x01000800, // SuperSPARC 3.x, no MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
@@ -1053,22 +1041,23 @@
},
{
.name = "TI SuperSparc 51",
- .iu_version = 0x43000000,
+ .iu_version = 0x40000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
+ .mmu_version = 0x01000000, // SuperSPARC 3.x, MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
.mmu_sfsr_mask = 0xffffffff,
.mmu_trcr_mask = 0xffffffff,
+ .mxcc_version = 0x00000104,
.nwindows = 8,
.features = CPU_DEFAULT_FEATURES,
},
{
.name = "TI SuperSparc 60", // STP1020APGA
- .iu_version = 0x40000000,
+ .iu_version = 0x40000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x03000000,
+ .mmu_version = 0x01000800, // SuperSPARC 3.x, no MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
@@ -1079,18 +1068,33 @@
},
{
.name = "TI SuperSparc 61",
- .iu_version = 0x44000000,
+ .iu_version = 0x44000000, // SuperSPARC 3.x
.fpu_version = 0 << 17,
- .mmu_version = 0x04000000,
+ .mmu_version = 0x01000000, // SuperSPARC 3.x, MXCC
.mmu_bm = 0x00002000,
.mmu_ctpr_mask = 0xffffffc0,
.mmu_cxr_mask = 0x0000ffff,
.mmu_sfsr_mask = 0xffffffff,
.mmu_trcr_mask = 0xffffffff,
+ .mxcc_version = 0x00000104,
.nwindows = 8,
.features = CPU_DEFAULT_FEATURES,
},
{
+ .name = "TI SuperSparc II",
+ .iu_version = 0x40000000, // SuperSPARC II 1.x
+ .fpu_version = 0 << 17,
+ .mmu_version = 0x08000000, // SuperSPARC II 1.x, MXCC
+ .mmu_bm = 0x00002000,
+ .mmu_ctpr_mask = 0xffffffc0,
+ .mmu_cxr_mask = 0x0000ffff,
+ .mmu_sfsr_mask = 0xffffffff,
+ .mmu_trcr_mask = 0xffffffff,
+ .mxcc_version = 0x00000104,
+ .nwindows = 8,
+ .features = CPU_DEFAULT_FEATURES,
+ },
+ {
.name = "Ross RT625",
.iu_version = 0x1e000000,
.fpu_version = 1 << 17,
Index: target-sparc/cpu.h
===================================================================
--- target-sparc/cpu.h (revision 6121)
+++ target-sparc/cpu.h (working copy)
@@ -210,6 +210,7 @@
uint32_t mmu_cxr_mask;
uint32_t mmu_sfsr_mask;
uint32_t mmu_trcr_mask;
+ uint32_t mxcc_version;
uint32_t features;
uint32_t nwindows;
uint32_t maxtl;
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [Qemu-devel] [PATCH] better SuperSPARC emulation
2008-12-23 14:41 [Qemu-devel] [PATCH] better SuperSPARC emulation Robert Reif
@ 2008-12-23 15:07 ` Blue Swirl
0 siblings, 0 replies; 2+ messages in thread
From: Blue Swirl @ 2008-12-23 15:07 UTC (permalink / raw)
To: qemu-devel
On 12/23/08, Robert Reif <reif@earthlink.net> wrote:
> Add better SuperSPARC processor emulation.
>
> With this patch, openboot is able to detect the SuperSPARC processor
> revision and cache size properly.
Thanks, applied as r6123.
^ permalink raw reply [flat|nested] 2+ messages in thread
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2008-12-23 15:07 ` Blue Swirl
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