From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LclGV-0001H1-AN for qemu-devel@nongnu.org; Thu, 26 Feb 2009 13:47:23 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LclGT-0001Er-NA for qemu-devel@nongnu.org; Thu, 26 Feb 2009 13:47:22 -0500 Received: from [199.232.76.173] (port=49973 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LclGT-0001EW-GJ for qemu-devel@nongnu.org; Thu, 26 Feb 2009 13:47:21 -0500 Received: from mail-fx0-f175.google.com ([209.85.220.175]:45915) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LclGT-0001kE-0g for qemu-devel@nongnu.org; Thu, 26 Feb 2009 13:47:21 -0500 Received: by fxm23 with SMTP id 23so619873fxm.34 for ; Thu, 26 Feb 2009 10:47:19 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1235644545-20816-2-git-send-email-yu.liu@freescale.com> References: <1235644545-20816-1-git-send-email-yu.liu@freescale.com> <1235644545-20816-2-git-send-email-yu.liu@freescale.com> Date: Thu, 26 Feb 2009 20:47:18 +0200 Message-ID: From: Blue Swirl Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH 1/5] kvm/powerpc: Enable MPIC for E500 platform. Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Liu Yu Cc: kvm-ppc@vger.kernel.org, hollisb@us.ibm.com, qemu-devel@nongnu.org, aurelien@aurel32.net On 2/26/09, Liu Yu wrote: > MPIC and OpenPIC have very similar design. > So a lot of code can be reused. > > Modification mainly include: > 1. keep struct openpic_t to the maximum size of both MPIC and OpenPIC. > 2. endianess swap. > MPIC has the same endianess as target, so no need to swap for MPIC. > 3. using different init functions and function pointers for reset and irq raise. > > Haven't test OpenPIC. > > Signed-off-by: Liu Yu > + struct { > + CPUReadMemoryFunc **read; > + CPUWriteMemoryFunc **write; > + target_phys_addr_t start_addr; > + ram_addr_t size; > + } list[] = { > + {mpic_glb_read, mpic_glb_write, MPIC_GLB_REG_START, MPIC_GLB_REG_SIZE}, > + {mpic_tmr_read, mpic_tmr_write, MPIC_TMR_REG_START, MPIC_TMR_REG_SIZE}, > + {mpic_ext_read, mpic_ext_write, MPIC_EXT_REG_START, MPIC_EXT_REG_SIZE}, > + {mpic_int_read, mpic_int_write, MPIC_INT_REG_START, MPIC_INT_REG_SIZE}, > + {mpic_msg_read, mpic_msg_write, MPIC_MSG_REG_START, MPIC_MSG_REG_SIZE}, > + {mpic_msi_read, mpic_msi_write, MPIC_MSI_REG_START, MPIC_MSI_REG_SIZE}, > + {mpic_cpu_read, mpic_cpu_write, MPIC_CPU_REG_START, MPIC_CPU_REG_SIZE}, > + }; "static const" ?