From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LclZb-0008Cj-5N for qemu-devel@nongnu.org; Thu, 26 Feb 2009 14:07:07 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LclZZ-0008Bv-KS for qemu-devel@nongnu.org; Thu, 26 Feb 2009 14:07:06 -0500 Received: from [199.232.76.173] (port=39741 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LclZZ-0008Bo-Fq for qemu-devel@nongnu.org; Thu, 26 Feb 2009 14:07:05 -0500 Received: from mail-bw0-f171.google.com ([209.85.218.171]:38015) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LclZZ-0005He-0H for qemu-devel@nongnu.org; Thu, 26 Feb 2009 14:07:05 -0500 Received: by bwz19 with SMTP id 19so613250bwz.34 for ; Thu, 26 Feb 2009 11:07:04 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <49A68893.7090102@earthlink.net> References: <49A68893.7090102@earthlink.net> Date: Thu, 26 Feb 2009 21:07:02 +0200 Message-ID: Subject: Re: [Qemu-devel] [PATCH] 64 bit I/O v3 From: Blue Swirl Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: qemu-devel@nongnu.org On 2/26/09, Robert Reif wrote: > This is the third version of adding 64 bit I/O support to QEMU. > int cpu_register_io_memory(int io_index, > CPUReadMemoryFunc **mem_read, > CPUWriteMemoryFunc **mem_write, > void *opaque) > { > - int i, subwidth = 0; > + if (io_index <= 0) { > + io_index = get_free_io_mem_idx(); > + if (io_index == -1) > + return io_index; > + } else { > + if (io_index >= IO_MEM_NB_ENTRIES) > + return -1; > + } > > + io_mem_read[io_index].b = mem_read[0]; > + io_mem_write[io_index].b = mem_write[0]; > + > + io_mem_read[io_index].w = mem_read[1]; > + io_mem_write[io_index].w = mem_write[1]; > + > + io_mem_read[io_index].l = mem_read[2]; > + io_mem_write[io_index].l = mem_write[2]; > + > + io_mem_read[io_index].q = NULL; > + io_mem_write[io_index].q = NULL; > + > + io_mem_opaque[io_index] = opaque; > + return (io_index << IO_MEM_SHIFT) | IO_MEM_SUBWIDTH; > +} I think for 64 bit accesses the default should be emulation using two 32 bit accesses instead of NULL (unassigned).