From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LdKOF-00066o-Ae for qemu-devel@nongnu.org; Sat, 28 Feb 2009 03:17:43 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LdKOC-00065C-PM for qemu-devel@nongnu.org; Sat, 28 Feb 2009 03:17:41 -0500 Received: from [199.232.76.173] (port=39635 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LdKOC-000659-Ip for qemu-devel@nongnu.org; Sat, 28 Feb 2009 03:17:40 -0500 Received: from mx20.gnu.org ([199.232.41.8]:15544) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1LdKOC-0006TQ-3Q for qemu-devel@nongnu.org; Sat, 28 Feb 2009 03:17:40 -0500 Received: from mail-bw0-f171.google.com ([209.85.218.171]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LdKOB-0000ch-CL for qemu-devel@nongnu.org; Sat, 28 Feb 2009 03:17:39 -0500 Received: by bwz19 with SMTP id 19so1225771bwz.34 for ; Sat, 28 Feb 2009 00:17:35 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: Date: Sat, 28 Feb 2009 10:17:34 +0200 Message-ID: Subject: Re: [Qemu-devel] [PATCH] Enable support for PPC64 on qemu target v2 From: Blue Swirl Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: openbios@openbios.org, qemu-devel@nongnu.org, Laurent Vivier On 2/28/09, Alexander Graf wrote: > > On 27.02.2009, at 22:47, Blue Swirl wrote: > > > > On 2/27/09, Alexander Graf wrote: > > > > > This patch enables OpenBIOS to initialize on PPC64, enabling support = for > > > -cpu 970fx. > > > It gets up to the boot prompt and works rather good so far, though I > haven't > > > been able to run a kernel yet. > > > > > > > It looks like there is a bug in Qemu (testing boot from Debian 4.0R5 CD= ): > > > > invalid/unsupported opcode: 1e - 12 - 1b (782106e4) 00000000014080e4 1 > > IN: > > 0x00000000014080d0: mr r31,r3 > > 0x00000000014080d4: mr r30,r4 > > 0x00000000014080d8: mr r29,r5 > > 0x00000000014080dc: mr r28,r6 > > 0x00000000014080e0: mr r27,r7 > > 0x00000000014080e4: rldicr r1,r1,0,59 > > > > But rldicr should be supported on a 750, according to "IBM PowerPC 740 > > / PowerPC 750 RISC Microprocessor User=E2=80=99s Manual". Sorry, I was confused: 970 !=3D 750. > Please keep in mind that booting a PPC64 kernel doesn't work for me yet. > I'm currently stuck with the DSI handler clobbering the high 32 bits in t= he > 64 bit GPRs. > > I'll try to write up a patch that provides custom register save/restore > code for ppc64. Are there any preferences on that? > > Would it be better to build a specific PPC64 binary or to detect which c= ode > to take in runtime and patch it accordingly? Single binary for both if possible.