From: Blue Swirl <blauwirbel@gmail.com>
To: Alexander Graf <alex@csgraf.de>
Cc: openbios@openbios.org, qemu-devel <qemu-devel@nongnu.org>,
Laurent Vivier <laurent@vivier.eu>
Subject: [Qemu-devel] Re: [PATCH] PPC64: Make OpenBIOS interrupt handlers 64bit aware v2
Date: Sat, 28 Feb 2009 20:41:00 +0200 [thread overview]
Message-ID: <f43fc5580902281041v855264y15365a65993fc141@mail.gmail.com> (raw)
In-Reply-To: <E186F5FD-886F-4084-B2F6-E8D38E8001C0@csgraf.de>
On 2/28/09, Alexander Graf <alex@csgraf.de> wrote:
> While booting a 64bit kernel, there is a small timeframe where OF and the
> kernel communicate with each other. Within that timeframe, DSI/ISI
> interrupts may occur, because some memory is not mapped yet.
>
> Right now in case that happens, we jump into the DSI/ISI interrupt handler
> which clobbers the high 32 bits of the kernel's registers. In order to
> circumvent that, let's save/restore all 64 bits of all kernel registers when
> we get a DSI/ISI interrupt.
>
> This patch enables a PPC64 Linux kernel to boot up to the point where it
> tries to set up the SLB entries (slbmte), which is not yet implemented in
> qemu.
>
> v2 implements handling for the HIOR register, bringing interrupt handlers to
> RAM.
>
> Signed-off-by: Alexander Graf <alex@csgraf.de>
Thanks, applied.
prev parent reply other threads:[~2009-02-28 18:41 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-02-28 16:45 [Qemu-devel] [PATCH] PPC64: Make OpenBIOS interrupt handlers 64bit aware v2 Alexander Graf
2009-02-28 18:41 ` Blue Swirl [this message]
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