From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LeDLR-0000rj-Px for qemu-devel@nongnu.org; Mon, 02 Mar 2009 13:58:29 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LeDLQ-0000p5-Io for qemu-devel@nongnu.org; Mon, 02 Mar 2009 13:58:28 -0500 Received: from [199.232.76.173] (port=39772 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LeDLQ-0000oq-8v for qemu-devel@nongnu.org; Mon, 02 Mar 2009 13:58:28 -0500 Received: from mail-bw0-f171.google.com ([209.85.218.171]:53624) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LeDLP-0004pL-Pt for qemu-devel@nongnu.org; Mon, 02 Mar 2009 13:58:28 -0500 Received: by bwz19 with SMTP id 19so1900819bwz.34 for ; Mon, 02 Mar 2009 10:58:26 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <1236013674-28082-3-git-send-email-agraf@suse.de> References: <1236013674-28082-1-git-send-email-agraf@suse.de> <1236013674-28082-2-git-send-email-agraf@suse.de> <1236013674-28082-3-git-send-email-agraf@suse.de> Date: Mon, 2 Mar 2009 20:58:26 +0200 Message-ID: From: Blue Swirl Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit Subject: [Qemu-devel] Re: [PATCH 2/3] PPC64: Implement slbmte Reply-To: qemu-devel@nongnu.org List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: Alexander Graf , qemu-devel@nongnu.org On 3/2/09, Alexander Graf wrote: > In order to modify SLB entries on recent PPC64 machines, the slbmte > instruction is used. > > This patch implements the slbmte instruction and makes the "bridge" > mode code use the slb set functions, so we can move the SLB into > the CPU struct later. > > This is required for Linux to run on PPC64. > > Signed-off-by: Alexander Graf > void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value) > { > LOG_MMU("%s: reg=%d " ADDRX " " ADDRX "\n", > __func__, srnum, value, env->sr[srnum]); > - if (env->sr[srnum] != value) { > + if (env->mmu_model & POWERPC_MMU_64) { > target_ulong helper_load_sr (target_ulong sr_num) > { > + if (env->mmu_model & POWERPC_MMU_64) > + return ppc_load_sr(env, sr_num); > return env->sr[sr_num]; > } It would be faster to move the MMU model checks to translation time.