[Qemu-devel] Re: [PATCH 2/3] PPC64: Implement slbmte

[Blue Swirl <blauwirbel@gmail.com>]

On 3/2/09, Alexander Graf <agraf@suse.de> wrote:
>
>  On 02.03.2009, at 19:58, Blue Swirl wrote:
>
>
> > On 3/2/09, Alexander Graf <agraf@suse.de> wrote:
> >
> > > In order to modify SLB entries on recent PPC64 machines, the slbmte
> > > instruction is used.
> > >
> > > This patch implements the slbmte instruction and makes the "bridge"
> > > mode code use the slb set functions, so we can move the SLB into
> > > the CPU struct later.
> > >
> > > This is required for Linux to run on PPC64.
> > >
> > > Signed-off-by: Alexander Graf <alex@csgraf.de>
> > >
> >
> >
> > >  void ppc_store_sr (CPUPPCState *env, int srnum, target_ulong value)
> > >  {
> > >    LOG_MMU("%s: reg=%d " ADDRX " " ADDRX "\n",
> > >                __func__, srnum, value, env->sr[srnum]);
> > > -    if (env->sr[srnum] != value) {
> > > +    if (env->mmu_model & POWERPC_MMU_64) {
> > >
> >
> >
> > >  target_ulong helper_load_sr (target_ulong sr_num)
> > >  {
> > > +    if (env->mmu_model & POWERPC_MMU_64)
> > > +        return ppc_load_sr(env, sr_num);
> > >    return env->sr[sr_num];
> > >  }
> > >
> >
> > It would be faster to move the MMU model checks to translation time.
> >
>
>  The problem is that we don't know which -cpu the user will give us when we
> run qemu-system-ppc64.
>  Of course we could just make qemu-system-ppc64 not take any non-64 bit
> CPUs, if nobody totally disagrees.

env could contain a pointer to (static const) structure describing the
CPU features. This pointer would be copied to corresponding
DisasContext feature pointer, to be used by the translation functions.

See for example target-sparc: translate.c (CHECK_IU_FEATURE macro) and
helper.c for CPU definitions. IIRC MIPS or ARM have even nicer macros.