From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1LzEvA-0008Td-8L for qemu-devel@nongnu.org; Wed, 29 Apr 2009 14:54:16 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1LzEv9-0008TR-Mn for qemu-devel@nongnu.org; Wed, 29 Apr 2009 14:54:15 -0400 Received: from [199.232.76.173] (port=59218 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1LzEv9-0008TO-JX for qemu-devel@nongnu.org; Wed, 29 Apr 2009 14:54:15 -0400 Received: from fg-out-1718.google.com ([72.14.220.159]:60418) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1LzEv9-0000cF-0V for qemu-devel@nongnu.org; Wed, 29 Apr 2009 14:54:15 -0400 Received: by fg-out-1718.google.com with SMTP id l27so1025717fgb.8 for ; Wed, 29 Apr 2009 11:54:14 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1241028165.24990.61.camel@slate.austin.ibm.com> References: <20090411172025.32383.77687.stgit@mchn012c.ww002.siemens.net> <20090411172026.32383.7492.stgit@mchn012c.ww002.siemens.net> <0A1FE637C2C7E148B9573BB60CC630E5210713@zch01exm26.fsl.freescale.net> <49F82E09.3070702@siemens.com> <1241025000.24990.51.camel@slate.austin.ibm.com> <49F890A5.8000405@codemonkey.ws> <1241028165.24990.61.camel@slate.austin.ibm.com> Date: Wed, 29 Apr 2009 21:54:14 +0300 Message-ID: Subject: Re: [Qemu-devel] [PATCH 4/7] kvm: Add sanity checks to slot management From: Blue Swirl Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Hollis Blanchard Cc: kvm-ppc@vger.kernel.org, Jan Kiszka , Liu Yu-B13201 , qemu-devel@nongnu.org On 4/29/09, Hollis Blanchard wrote: > On Wed, 2009-04-29 at 12:38 -0500, Anthony Liguori wrote: > > Hollis Blanchard wrote: > > > On Wed, 2009-04-29 at 12:38 +0200, Jan Kiszka wrote: > > > > > >> What is the alignment of those regions then? None? And do regions of > > >> different types overlap even on the same page? Maybe the check reveals > > >> some deeper conflict /wrt KVM. Can you point me to the involved code files? > > >> > > > > > > These PCI controllers make separate calls to > > > cpu_register_physical_memory() for separate callbacks. Reading > > > ppce500_pci_init(), for example: > > > 0xe0008000 -> CFGADDR (4 bytes) > > > 0xe0008004 -> CFGDATA (4 bytes) > > > 0xe0008c00 -> other registers > > > > > > > That's goofy. If the single device owns the entire region, it should > > region the entire region instead of relying on subpage functionality. > > > > If just requires a switch() on the address to dispatch to the > > appropriate functions. It should be easy enough to fix. > > There are two cases that share this code path: > 1) same driver registers multiple regions in the same page > 2) different drivers register regions in the same page > > This is case 1, and as you say, we could add a switch statement to > handle it. I did not look closely to see how many other callers fall > into this category. > > However, are you suggesting that case 2 is also "goofy" and will never > work with KVM? It works in qemu today. As long as case 2 works, case 1 > will work too, so why change anything? I don't see why it would be wrong to register multiple regions within the same page. It means that you can catch accesses to unassigned addresses between the regions. There are two instances of Sparc32 DMA controller, one to serve ESP and the other for Lance. These are at addresses dma_base and dma_base + 16. Before subpage, this was handled with a switch, but now we rely on the subpage mechanism instead.