From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MGcD3-00036c-Dv for qemu-devel@nongnu.org; Tue, 16 Jun 2009 13:12:33 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MGcCy-000332-NZ for qemu-devel@nongnu.org; Tue, 16 Jun 2009 13:12:33 -0400 Received: from [199.232.76.173] (port=41433 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MGcCy-00032q-Gv for qemu-devel@nongnu.org; Tue, 16 Jun 2009 13:12:28 -0400 Received: from mail-bw0-f223.google.com ([209.85.218.223]:47122) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MGcCy-0003A4-4T for qemu-devel@nongnu.org; Tue, 16 Jun 2009 13:12:28 -0400 Received: by bwz23 with SMTP id 23so3770997bwz.34 for ; Tue, 16 Jun 2009 10:12:27 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <200906161754.59643.paul@codesourcery.com> References: <20090611084808.GA19508@redhat.com> <20090616152050.GD782@redhat.com> <200906161754.59643.paul@codesourcery.com> Date: Tue, 16 Jun 2009 20:12:26 +0300 Message-ID: Subject: Re: [Qemu-devel] Register uhci_reset() callback. From: Blue Swirl Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Paul Brook Cc: qemu-devel@nongnu.org, Gleb Natapov , Avi Kivity On 6/16/09, Paul Brook wrote: > On Tuesday 16 June 2009, Gleb Natapov wrote: > > On Tue, Jun 16, 2009 at 06:14:51PM +0300, Blue Swirl wrote: > > > > Because interrupt line is stuck a guest can't get to the point where it > > > > loads a driver to the second device. For outside observer the guest > > > > just hangs. > > > > > > I see. The problem is in piix_pci interrupt handling, pci_irq_levels[] > > > should be set to zero on reset. > > > > The patch that does that was rejected earlier :) > > http://lists.gnu.org/archive/html/qemu-devel/2009-06/msg00342.html > > http://lists.gnu.org/archive/html/qemu-devel/2009-06/msg00344.html > > > You're both wrong. > > If allow devices to be reset independently then they should probably set theit > IRQ output on reset. > > IRQ muxes (e.g. PCI busses) should handle reseting and save/restore of their > own internal state. Fully agree. > Devices should not cause IRQ state changes on restore. Commit 3dcd219f is > incorrect. I'm not so sure about this, but I can't think of a restore sequence where the IRQ state would need to be changed if the IRQs tied together are handled correctly. But surely if the devices states are restored in strange order, the state changes could cause problems because the device receiving the IRQ may still contain old state.