From: Blue Swirl <blauwirbel@gmail.com>
To: Paul Brook <paul@codesourcery.com>
Cc: qemu-devel@nongnu.org, Gleb Natapov <gleb@redhat.com>,
Avi Kivity <avi@redhat.com>
Subject: Re: [Qemu-devel] Register uhci_reset() callback.
Date: Tue, 16 Jun 2009 21:10:01 +0300 [thread overview]
Message-ID: <f43fc5580906161110u6bea5ef9m79589c50db73ac9d@mail.gmail.com> (raw)
In-Reply-To: <200906161900.11811.paul@codesourcery.com>
On 6/16/09, Paul Brook <paul@codesourcery.com> wrote:
> > > Devices should not cause IRQ state changes on restore. Commit 3dcd219f
> > > is incorrect.
> >
> > I'm not so sure about this, but I can't think of a restore sequence
> > where the IRQ state would need to be changed if the IRQs tied together
> > are handled correctly. But surely if the devices states are restored
> > in strange order, the state changes could cause problems because the
> > device receiving the IRQ may still contain old state.
>
>
> It's precisely because devices are restored in unpredictable order that they
> should not be communicating with other devices (e.g. by modifying IRQ lines).
>
> Consider a system with a device (DEV) and a level triggered interrupt
> controller (PIC1) chained to an edge triggered interrupt controller (PIC2).
>
> (DEV) -> (PIC1) -> (PIC2)
>
> Before restore, DEV output is low, PIC1 has the interrupt unmasked (but low),
> PIC2 has no pending interrupts.
>
> We now restore a state where DEV output is high, PIC1 has masked the
> interrupt, and PIC2 has no pending interrupts. Devices are restored in he
> order PIC2, DEV, PIC1.
>
> If devices toggle their interrupts on restore then we get incorrect state
> after the restore:
>
> PIC2 is restored to the desired no-interrupts-pending state.
> DEV is restored. This raises the IRQ, which is passed to PIC1. PIC1 still has
> the old interrupt mask, so passes through to PIC2, which detects the edge
> event and marks the interrupt as pending.
> PIC1 is restored, updates the new mask and lowers its output. However this
> does not clear the internal PIC2 pending interrupt flag, so machine state will
> be wrong after resume.
Yes, this is the "bad" restore scenario that I had in mind. I still
have a nagging feeling that there is a reverse scenario, where in
order to reach good state, you would have to call the IRQ function.
Anyway, 3dcd219f may not be correct in that case either.
next prev parent reply other threads:[~2009-06-16 18:10 UTC|newest]
Thread overview: 39+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-06-11 8:48 [Qemu-devel] Register uhci_reset() callback Gleb Natapov
2009-06-11 13:41 ` Paul Brook
2009-06-11 13:46 ` Gleb Natapov
2009-06-11 13:53 ` Paul Brook
2009-06-11 14:00 ` Gleb Natapov
2009-06-11 16:38 ` Jamie Lokier
2009-06-11 16:40 ` Gleb Natapov
2009-06-15 16:20 ` Avi Kivity
2009-06-16 15:00 ` Jamie Lokier
2009-06-16 15:18 ` Avi Kivity
2009-06-16 15:43 ` Jamie Lokier
2009-06-15 16:21 ` Avi Kivity
2009-06-15 17:02 ` Gleb Natapov
2009-06-15 17:17 ` Avi Kivity
2009-06-15 17:21 ` Gleb Natapov
2009-06-15 17:56 ` Paul Brook
2009-06-15 18:16 ` Gleb Natapov
2009-06-15 18:57 ` Blue Swirl
2009-06-15 19:30 ` Gleb Natapov
2009-06-15 19:50 ` Blue Swirl
2009-06-15 20:05 ` Gleb Natapov
2009-06-16 15:14 ` Blue Swirl
2009-06-16 15:20 ` Gleb Natapov
2009-06-16 16:54 ` Blue Swirl
2009-06-16 17:09 ` Gleb Natapov
2009-06-16 17:19 ` Blue Swirl
2009-06-16 18:39 ` Gleb Natapov
2009-06-18 9:20 ` Avi Kivity
2009-06-16 16:54 ` Paul Brook
2009-06-16 17:12 ` Blue Swirl
2009-06-16 18:00 ` Paul Brook
2009-06-16 18:10 ` Blue Swirl [this message]
2009-06-16 18:52 ` Jamie Lokier
2009-06-16 19:05 ` Jamie Lokier
2009-06-16 19:10 ` Blue Swirl
2009-06-16 19:23 ` Gleb Natapov
2009-06-16 19:16 ` Paul Brook
2009-06-16 17:47 ` Gleb Natapov
2009-06-16 17:04 ` Paul Brook
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