From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MT9fW-0001ys-Up for qemu-devel@nongnu.org; Tue, 21 Jul 2009 03:21:46 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MT9fW-0001yg-Bg for qemu-devel@nongnu.org; Tue, 21 Jul 2009 03:21:46 -0400 Received: from [199.232.76.173] (port=45235 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MT9fW-0001yc-6o for qemu-devel@nongnu.org; Tue, 21 Jul 2009 03:21:46 -0400 Received: from mx20.gnu.org ([199.232.41.8]:59940) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MT9fV-0005gq-Nv for qemu-devel@nongnu.org; Tue, 21 Jul 2009 03:21:45 -0400 Received: from fg-out-1718.google.com ([72.14.220.154]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MT9fT-0000p6-WD for qemu-devel@nongnu.org; Tue, 21 Jul 2009 03:21:44 -0400 Received: by fg-out-1718.google.com with SMTP id l27so1035623fgb.8 for ; Tue, 21 Jul 2009 00:21:42 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: From: Blue Swirl Date: Tue, 21 Jul 2009 10:21:22 +0300 Message-ID: Subject: Re: [Qemu-devel] [PATCH] sparc64 replace tsptr with helper routine Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Kovalenko Cc: qemu-devel@nongnu.org On Mon, Jul 20, 2009 at 10:00 PM, Igor Kovalenko wrote: > On Mon, Jul 20, 2009 at 10:49 AM, Blue Swirl wrote: >> On Mon, Jul 20, 2009 at 12:19 AM, Igor >> Kovalenko wrote: >>> tl and tsptr of members sparc64 cpu state must be changed >>> simultaneously to keep trap state window in sync with current >>> trap level. Currently translation of store to tl does not change >>> tsptr, which leads to corrupt trap state on corresponding >>> trap level. >>> >>> This patch removes tsptr from sparc64 cpu state and replaces >>> all uses with call to helper routine. >> >> I'd rather have the stores to TL fixed instead of introducing a >> helper. A new function to set both TL and tsptr may help. Which stores >> to TL do not change tsptr? > The problem is with translate.c portion about handling wrpr > (it sets tl only). My idea is that even remote possibility of tsptr > and tl going out of sync guarantees killing one of them. Since > tl is a real register I decided to loose tsptr. Getting rid of env->tsptr is OK, but it seems pointless to introduce a helper for such a small task. We could easily perform the get_tsptr calculation at translation time. >> On CPU reset, TL should be MAXTL for POR and MIN(TL+1, MAXTL) in other >> cases but your patch would set it to 0. > > Right but please see that original code did not done that either :) > > Please see updated patch which additionally sets tl=maxtl. > I decided to populate trap level, trap type and pstate with > power-on reset values since other reset types are not handled yet. Well, there is a kludge to handle the different PC for POR and others in sun4u.c. Maybe this should be moved to helper.c and handled properly with other reset type changes.