On Tue, Jul 28, 2009 at 9:14 PM, Artyom
Tarasenko<atar4qemu@googlemail.com> wrote:
>> Unfortunately it also makes BSDs think that the bus reset hasn't happened:
>
>
> How about this one? Seems to be fine with NetBSD. Not "fast" though,
> emulates more precisely what would happen on a real hw.

Thanks, but I read the interrupt register part of the data sheet
again, and it looks like the current implementation was not correct at
all.

This patch clears interrupt, sequence and status registers like the
data sheet specifies and also passes my tests, does it help with
yours?

In the future, please add a Signed-off-by line. The coding style
(indentation, spaces between tokens) did not match rest of QEMU and
expression order should be like x == 1, not 1 == x.