From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MWmnk-00021q-B6 for qemu-devel@nongnu.org; Fri, 31 Jul 2009 03:45:16 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MWmnj-000214-LS for qemu-devel@nongnu.org; Fri, 31 Jul 2009 03:45:16 -0400 Received: from [199.232.76.173] (port=50830 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MWmnj-000211-G2 for qemu-devel@nongnu.org; Fri, 31 Jul 2009 03:45:15 -0400 Received: from mx20.gnu.org ([199.232.41.8]:31378) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1MWmni-0006jQ-Pa for qemu-devel@nongnu.org; Fri, 31 Jul 2009 03:45:15 -0400 Received: from fg-out-1718.google.com ([72.14.220.153]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MWmnd-00023R-6H for qemu-devel@nongnu.org; Fri, 31 Jul 2009 03:45:09 -0400 Received: by fg-out-1718.google.com with SMTP id l27so42061fgb.8 for ; Fri, 31 Jul 2009 00:45:07 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: From: Blue Swirl Date: Fri, 31 Jul 2009 10:44:47 +0300 Message-ID: Subject: Re: [Qemu-devel] [patch] esp.c fast SCSI-bus reset Content-Type: multipart/mixed; boundary=000e0cd24ba85c2385046ffb9981 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Artyom Tarasenko Cc: qemu-devel --000e0cd24ba85c2385046ffb9981 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On Tue, Jul 28, 2009 at 9:14 PM, Artyom Tarasenko wrote: >> Unfortunately it also makes BSDs think that the bus reset hasn't happened: > > > How about this one? Seems to be fine with NetBSD. Not "fast" though, > emulates more precisely what would happen on a real hw. Thanks, but I read the interrupt register part of the data sheet again, and it looks like the current implementation was not correct at all. This patch clears interrupt, sequence and status registers like the data sheet specifies and also passes my tests, does it help with yours? In the future, please add a Signed-off-by line. The coding style (indentation, spaces between tokens) did not match rest of QEMU and expression order should be like x == 1, not 1 == x. --000e0cd24ba85c2385046ffb9981 Content-Type: application/x-patch; name="0001-esp-fix-interrupt-register-read.patch" Content-Disposition: attachment; filename="0001-esp-fix-interrupt-register-read.patch" Content-Transfer-Encoding: base64 X-Attachment-Id: f_fxslptji0 RnJvbSAyODE0ZGYyOGVmYzE4NGRkMzI3ZTE1YTJiYjc1MTE5YzFlZjE5NTY0IE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBCbHVlIFN3aXJsIDxibGF1d2lyYmVsQGdtYWlsLmNvbT4KRGF0 ZTogRnJpLCAzMSBKdWwgMjAwOSAwNzoyNjo0NCArMDAwMApTdWJqZWN0OiBbUEFUQ0hdIGVzcDog Zml4IGludGVycnVwdCByZWdpc3RlciByZWFkCgpSZWFkIG9mIGludGVycnVwdCByZWdpc3RlciBz aG91bGQgY2xlYXIgaXQgYW5kIGFsc28gc2VxdWVuY2Ugc3RlcCBhbmQgc3RhdHVzLgoKU2lnbmVk LW9mZi1ieTogQmx1ZSBTd2lybCA8YmxhdXdpcmJlbEBnbWFpbC5jb20+Ci0tLQogaHcvZXNwLmMg fCAgIDEzICsrKysrKysrKy0tLS0KIDEgZmlsZXMgY2hhbmdlZCwgOSBpbnNlcnRpb25zKCspLCA0 IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2h3L2VzcC5jIGIvaHcvZXNwLmMKaW5kZXggOWVh Y2NjYi4uY2I2Yzk5MyAxMDA2NDQKLS0tIGEvaHcvZXNwLmMKKysrIGIvaHcvZXNwLmMKQEAgLTQy Miw3ICs0MjIsNyBAQCBzdGF0aWMgdm9pZCBwYXJlbnRfZXNwX3Jlc2V0KHZvaWQgKm9wYXF1ZSwg aW50IGlycSwgaW50IGxldmVsKQogc3RhdGljIHVpbnQzMl90IGVzcF9tZW1fcmVhZGIodm9pZCAq b3BhcXVlLCB0YXJnZXRfcGh5c19hZGRyX3QgYWRkcikKIHsKICAgICBFU1BTdGF0ZSAqcyA9IG9w YXF1ZTsKLSAgICB1aW50MzJfdCBzYWRkcjsKKyAgICB1aW50MzJfdCBzYWRkciwgb2xkX3ZhbDsK IAogICAgIHNhZGRyID0gYWRkciA+PiBzLT5pdF9zaGlmdDsKICAgICBEUFJJTlRGKCJyZWFkIHJl Z1slZF06IDB4JTIuMnhcbiIsIHNhZGRyLCBzLT5ycmVnc1tzYWRkcl0pOwpAQCAtNDQ1LDEwICs0 NDUsMTUgQEAgc3RhdGljIHVpbnQzMl90IGVzcF9tZW1fcmVhZGIodm9pZCAqb3BhcXVlLCB0YXJn ZXRfcGh5c19hZGRyX3QgYWRkcikKICAgICAgICAgfQogICAgICAgICBicmVhazsKICAgICBjYXNl IEVTUF9SSU5UUjoKLSAgICAgICAgLy8gQ2xlYXIgaW50ZXJydXB0L2Vycm9yIHN0YXR1cyBiaXRz Ci0gICAgICAgIHMtPnJyZWdzW0VTUF9SU1RBVF0gJj0gfihTVEFUX0dFIHwgU1RBVF9QRSk7Cisg ICAgICAgIC8qIENsZWFyIHNlcXVlbmNlIHN0ZXAsIGludGVycnVwdCByZWdpc3RlciBhbmQgYWxs IHN0YXR1cyBiaXRzCisgICAgICAgICAgIGV4Y2VwdCBUQyAqLworICAgICAgICBvbGRfdmFsID0g cy0+cnJlZ3NbRVNQX1JJTlRSXTsKKyAgICAgICAgcy0+cnJlZ3NbRVNQX1JJTlRSXSA9IDA7Cisg ICAgICAgIHMtPnJyZWdzW0VTUF9SU1RBVF0gJj0gflNUQVRfVEM7CisgICAgICAgIHMtPnJyZWdz W0VTUF9SU0VRXSA9IFNFUV9DRDsKICAgICAgICAgZXNwX2xvd2VyX2lycShzKTsKLSAgICAgICAg YnJlYWs7CisKKyAgICAgICAgcmV0dXJuIG9sZF92YWw7CiAgICAgZGVmYXVsdDoKICAgICAgICAg YnJlYWs7CiAgICAgfQotLSAKMS41LjYuNQoK --000e0cd24ba85c2385046ffb9981--