From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MYlJG-0005vY-Cb for qemu-devel@nongnu.org; Wed, 05 Aug 2009 14:33:58 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MYlJE-0005vM-S3 for qemu-devel@nongnu.org; Wed, 05 Aug 2009 14:33:57 -0400 Received: from [199.232.76.173] (port=48881 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MYlJE-0005vJ-E6 for qemu-devel@nongnu.org; Wed, 05 Aug 2009 14:33:56 -0400 Received: from fg-out-1718.google.com ([72.14.220.158]:7301) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MYlJD-0003Yu-U9 for qemu-devel@nongnu.org; Wed, 05 Aug 2009 14:33:56 -0400 Received: by fg-out-1718.google.com with SMTP id l27so1052883fgb.8 for ; Wed, 05 Aug 2009 11:33:54 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: From: Blue Swirl Date: Wed, 5 Aug 2009 21:33:34 +0300 Message-ID: Subject: Re: [Qemu-devel] sparc32 reset's regression Content-Type: multipart/mixed; boundary=000e0cd2491ec981ab0470693e3a List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Artyom Tarasenko Cc: qemu-devel --000e0cd2491ec981ab0470693e3a Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit On Wed, Aug 5, 2009 at 11:44 AM, Artyom Tarasenko wrote: > reset on SS-10/SS-20 machines hangs on memory detection if > qemu-system-sparc is launched with OBP (not OpenBios). > > git bisect shows that the regression comes with the patch > "Don't set IRQs on device reset and loadvm/savevm" on 2009-06-17 19:20:01. The commit looks fine to me. Would this patch happen to fix the bug? --000e0cd2491ec981ab0470693e3a Content-Type: application/mbox; name="0001-Fix-reset.patch" Content-Disposition: attachment; filename="0001-Fix-reset.patch" Content-Transfer-Encoding: base64 X-Attachment-Id: f_fy0eco3k0 RnJvbSA5ZGJhZGEyMTE3NDE4MzQzM2JkNTU2MGM1OWQzZGM3YTFhODliYmU5IE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBCbHVlIFN3aXJsIDxibGF1d2lyYmVsQGdtYWlsLmNvbT4KRGF0 ZTogV2VkLCA1IEF1ZyAyMDA5IDE4OjMxOjMyICswMDAwClN1YmplY3Q6IFtQQVRDSF0gRml4IHJl c2V0CgpTaWduZWQtb2ZmLWJ5OiBCbHVlIFN3aXJsIDxibGF1d2lyYmVsQGdtYWlsLmNvbT4KLS0t CiBody9zbGF2aW9faW50Y3RsLmMgfCAgICAyICstCiAxIGZpbGVzIGNoYW5nZWQsIDEgaW5zZXJ0 aW9ucygrKSwgMSBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQgYS9ody9zbGF2aW9faW50Y3RsLmMg Yi9ody9zbGF2aW9faW50Y3RsLmMKaW5kZXggMTg4NTExZS4uNjIzZjgyYyAxMDA2NDQKLS0tIGEv aHcvc2xhdmlvX2ludGN0bC5jCisrKyBiL2h3L3NsYXZpb19pbnRjdGwuYwpAQCAtMzgzLDcgKzM4 Myw3IEBAIHN0YXRpYyB2b2lkIHNsYXZpb19pbnRjdGxfcmVzZXQodm9pZCAqb3BhcXVlKQogICAg IHMtPmludHJlZ21fZGlzYWJsZWQgPSB+TUFTVEVSX0lSUV9NQVNLOwogICAgIHMtPmludHJlZ21f cGVuZGluZyA9IDA7CiAgICAgcy0+dGFyZ2V0X2NwdSA9IDA7Ci0gICAgc2xhdmlvX2NoZWNrX2lu dGVycnVwdHMocywgMCk7CisgICAgc2xhdmlvX2NoZWNrX2ludGVycnVwdHMocywgMSk7CiB9CiAK IHN0YXRpYyB2b2lkIHNsYXZpb19pbnRjdGxfaW5pdDEoU3lzQnVzRGV2aWNlICpkZXYpCi0tIAox LjUuNi41Cgo= --000e0cd2491ec981ab0470693e3a--