* [Qemu-devel] [Patch] sparc32 remove an unnecessary cpu irq set
@ 2009-08-12 16:28 Artyom Tarasenko
[not found] ` <b2fa41d60908121143tb46ceeehfa37bbc448e0eb5a@mail.gmail.com>
0 siblings, 1 reply; 4+ messages in thread
From: Artyom Tarasenko @ 2009-08-12 16:28 UTC (permalink / raw)
To: Blue Swirl; +Cc: qemu-devel
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
---
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -485,9 +485,6 @@ int cpu_exec(CPUState *env1)
env->exception_index = env->interrupt_index;
do_interrupt(env);
env->interrupt_index = 0;
-#if !defined(CONFIG_USER_ONLY)
- cpu_check_irqs(env);
-#endif
next_tb = 0;
}
} else if (interrupt_request & CPU_INTERRUPT_TIMER) {
diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h
index 2428bb2..b69ebf5 100644
--- a/target-sparc/cpu.h
+++ b/target-sparc/cpu.h
@@ -480,9 +480,11 @@ static inline int cpu_cwp_dec(CPUSPARCState *env1, int cwp)
#if !defined (TARGET_SPARC64)
#define PUT_PSR(env, val) do { int _tmp = val; \
+ int _newpsrpil=(_tmp & PSR_PIL) >> 8; \
env->psr = _tmp & PSR_ICC; \
env->psref = (_tmp & PSR_EF)? 1 : 0; \
- env->psrpil = (_tmp & PSR_PIL) >> 8; \
+ if((_newpsrpil>env->psrpil)&& ((env->pil_in&15)>_newpsrpil))
cpu_check_irqs(env); \
+ env->psrpil = _newpsrpil; \
env->psrs = (_tmp & PSR_S)? 1 : 0; \
env->psrps = (_tmp & PSR_PS)? 1 : 0; \
env->psret = (_tmp & PSR_ET)? 1 : 0; \
^ permalink raw reply related [flat|nested] 4+ messages in thread[parent not found: <b2fa41d60908121143tb46ceeehfa37bbc448e0eb5a@mail.gmail.com>]
* Re: [Qemu-devel] [Patch] sparc32 remove an unnecessary cpu irq set [not found] ` <b2fa41d60908121143tb46ceeehfa37bbc448e0eb5a@mail.gmail.com> @ 2009-08-13 15:44 ` Artyom Tarasenko 2009-08-13 19:33 ` Blue Swirl 0 siblings, 1 reply; 4+ messages in thread From: Artyom Tarasenko @ 2009-08-13 15:44 UTC (permalink / raw) To: qemu-devel, Blue Swirl, Igor Kovalenko 2009/8/12 Igor Kovalenko <igor.v.kovalenko@gmail.com>: > PUT_PSR is asking to be made inline function with arch-specific parts, > the sparc64 counterpart is too similar. Ok, here we go: Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> --- --- a/cpu-exec.c +++ b/cpu-exec.c @@ -485,9 +485,6 @@ int cpu_exec(CPUState *env1) env->exception_index = env->interrupt_index; do_interrupt(env); env->interrupt_index = 0; -#if !defined(CONFIG_USER_ONLY) - cpu_check_irqs(env); -#endif next_tb = 0; } } else if (interrupt_request & CPU_INTERRUPT_TIMER) { diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 2428bb2..19a81c4 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -439,6 +439,21 @@ int cpu_sparc_exec(CPUSPARCState *s); #endif #ifndef NO_CPU_IO_DEFS + +static inline int cpu_cwp_inc(CPUSPARCState *env1, int cwp) +{ + if (unlikely(cwp >= env1->nwindows)) + cwp -= env1->nwindows; + return cwp; +} + +static inline int cpu_cwp_dec(CPUSPARCState *env1, int cwp) +{ + if (unlikely(cwp < 0)) + cwp += env1->nwindows; + return cwp; +} +#endif static inline void memcpy32(target_ulong *dst, const target_ulong *src) { dst[0] = src[0]; @@ -463,43 +478,30 @@ static inline void cpu_set_cwp(CPUSPARCState *env1, int new_cwp) env1->regwptr = env1->regbase + (new_cwp * 16); } -static inline int cpu_cwp_inc(CPUSPARCState *env1, int cwp) -{ - if (unlikely(cwp >= env1->nwindows)) - cwp -= env1->nwindows; - return cwp; -} +/* sum4m.c, sun4u.c */ +void cpu_check_irqs(CPUSPARCState *env); -static inline int cpu_cwp_dec(CPUSPARCState *env1, int cwp) +static inline void PUT_PSR(CPUSPARCState *env, target_ulong val) { - if (unlikely(cwp < 0)) - cwp += env1->nwindows; - return cwp; -} + env->psr = val & PSR_ICC; + env->psref = (val & PSR_EF)? 1 : 0; +#if ((!defined (TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) + int _newpsrpil=(val & PSR_PIL) >> 8; + if((_newpsrpil>env->psrpil)&& ((env->pil_in&15)>_newpsrpil)) { + env->psrpil = _newpsrpil; + cpu_check_irqs(env); + } else env->psrpil = _newpsrpil; +#else + env->psrpil = (val & PSR_PIL) >> 8; #endif - + env->psrs = (val & PSR_S)? 1 : 0; + env->psrps = (val & PSR_PS)? 1 : 0; #if !defined (TARGET_SPARC64) -#define PUT_PSR(env, val) do { int _tmp = val; \ - env->psr = _tmp & PSR_ICC; \ - env->psref = (_tmp & PSR_EF)? 1 : 0; \ - env->psrpil = (_tmp & PSR_PIL) >> 8; \ - env->psrs = (_tmp & PSR_S)? 1 : 0; \ - env->psrps = (_tmp & PSR_PS)? 1 : 0; \ - env->psret = (_tmp & PSR_ET)? 1 : 0; \ - cpu_set_cwp(env, _tmp & PSR_CWP); \ - CC_OP = CC_OP_FLAGS; \ - } while (0) -#else -#define PUT_PSR(env, val) do { int _tmp = val; \ - env->psr = _tmp & PSR_ICC; \ - env->psref = (_tmp & PSR_EF)? 1 : 0; \ - env->psrpil = (_tmp & PSR_PIL) >> 8; \ - env->psrs = (_tmp & PSR_S)? 1 : 0; \ - env->psrps = (_tmp & PSR_PS)? 1 : 0; \ - cpu_set_cwp(env, _tmp & PSR_CWP); \ - CC_OP = CC_OP_FLAGS; \ - } while (0) + env->psret = (val & PSR_ET)? 1 : 0; #endif + cpu_set_cwp(env, val & PSR_CWP); + CC_OP = CC_OP_FLAGS; +} #ifdef TARGET_SPARC64 #define GET_CCR(env) (((env->xcc >> 20) << 4) | ((env->psr & PSR_ICC) >> 20)) @@ -585,9 +587,6 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) #include "cpu-all.h" #include "exec-all.h" -/* sum4m.c, sun4u.c */ -void cpu_check_irqs(CPUSPARCState *env); - #ifdef TARGET_SPARC64 /* sun4u.c */ void cpu_tick_set_count(void *opaque, uint64_t count); ^ permalink raw reply related [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [Patch] sparc32 remove an unnecessary cpu irq set 2009-08-13 15:44 ` Artyom Tarasenko @ 2009-08-13 19:33 ` Blue Swirl 2009-08-14 10:37 ` Artyom Tarasenko 0 siblings, 1 reply; 4+ messages in thread From: Blue Swirl @ 2009-08-13 19:33 UTC (permalink / raw) To: Artyom Tarasenko; +Cc: qemu-devel On Thu, Aug 13, 2009 at 6:44 PM, Artyom Tarasenko<atar4qemu@googlemail.com> wrote: > 2009/8/12 Igor Kovalenko <igor.v.kovalenko@gmail.com>: >> PUT_PSR is asking to be made inline function with arch-specific parts, >> the sparc64 counterpart is too similar. > Ok, here we go: Sorry, it does not apply. > -#if !defined(CONFIG_USER_ONLY) > - cpu_check_irqs(env); > -#endif This should be in a separate patch, preferably one with the check moved to helper_wrpsr. > +/* sum4m.c, sun4u.c */ > +void cpu_check_irqs(CPUSPARCState *env); The prototypes should remain in header files. ^ permalink raw reply [flat|nested] 4+ messages in thread
* Re: [Qemu-devel] [Patch] sparc32 remove an unnecessary cpu irq set 2009-08-13 19:33 ` Blue Swirl @ 2009-08-14 10:37 ` Artyom Tarasenko 0 siblings, 0 replies; 4+ messages in thread From: Artyom Tarasenko @ 2009-08-14 10:37 UTC (permalink / raw) To: Blue Swirl; +Cc: qemu-devel [-- Attachment #1: Type: text/plain, Size: 1175 bytes --] 2009/8/13 Blue Swirl <blauwirbel@gmail.com>: > On Thu, Aug 13, 2009 at 6:44 PM, Artyom > Tarasenko<atar4qemu@googlemail.com> wrote: >> 2009/8/12 Igor Kovalenko <igor.v.kovalenko@gmail.com>: >>> PUT_PSR is asking to be made inline function with arch-specific parts, >>> the sparc64 counterpart is too similar. >> Ok, here we go: > > Sorry, it does not apply. Ups, copy&paste error, sorry. This time I send it as an attachment. >> -#if !defined(CONFIG_USER_ONLY) >> - cpu_check_irqs(env); >> -#endif > > This should be in a separate patch, preferably one with the check > moved to helper_wrpsr. But that's the purpose of the patch. The check is moved to PUT_PSR, not to helper_wrpsr, because helper_wrpsr is not the only function calling PUT_PSR. From the code I can't tell that the other calls can not trigger an irq as well. >> +/* sum4m.c, sun4u.c */ >> +void cpu_check_irqs(CPUSPARCState *env); > > The prototypes should remain in header files. The two lines are moved from the line number 481 to the line number 588 within the same file. Btw there's a typo, I guess it should be su_n_4m. :) Fixed this too. [-- Attachment #2: 0001-fix-multiple-irq-set.patch --] [-- Type: text/plain, Size: 4129 bytes --] Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com> --- diff --git a/cpu-exec.c b/cpu-exec.c index 1718dc4..2b74aee 100644 --- a/cpu-exec.c +++ b/cpu-exec.c @@ -485,9 +485,6 @@ int cpu_exec(CPUState *env1) env->exception_index = env->interrupt_index; do_interrupt(env); env->interrupt_index = 0; -#if !defined(CONFIG_USER_ONLY) - cpu_check_irqs(env); -#endif next_tb = 0; } } else if (interrupt_request & CPU_INTERRUPT_TIMER) { diff --git a/target-sparc/cpu.h b/target-sparc/cpu.h index 2428bb2..19a81c4 100644 --- a/target-sparc/cpu.h +++ b/target-sparc/cpu.h @@ -439,6 +439,21 @@ int cpu_sparc_exec(CPUSPARCState *s); #endif #ifndef NO_CPU_IO_DEFS + +static inline int cpu_cwp_inc(CPUSPARCState *env1, int cwp) +{ + if (unlikely(cwp >= env1->nwindows)) + cwp -= env1->nwindows; + return cwp; +} + +static inline int cpu_cwp_dec(CPUSPARCState *env1, int cwp) +{ + if (unlikely(cwp < 0)) + cwp += env1->nwindows; + return cwp; +} +#endif static inline void memcpy32(target_ulong *dst, const target_ulong *src) { dst[0] = src[0]; @@ -463,43 +478,30 @@ static inline void cpu_set_cwp(CPUSPARCState *env1, int new_cwp) env1->regwptr = env1->regbase + (new_cwp * 16); } -static inline int cpu_cwp_inc(CPUSPARCState *env1, int cwp) -{ - if (unlikely(cwp >= env1->nwindows)) - cwp -= env1->nwindows; - return cwp; -} +/* sun4m.c, sun4u.c */ +void cpu_check_irqs(CPUSPARCState *env); -static inline int cpu_cwp_dec(CPUSPARCState *env1, int cwp) +static inline void PUT_PSR(CPUSPARCState *env, target_ulong val) { - if (unlikely(cwp < 0)) - cwp += env1->nwindows; - return cwp; -} + env->psr = val & PSR_ICC; + env->psref = (val & PSR_EF)? 1 : 0; +#if ((!defined (TARGET_SPARC64)) && !defined(CONFIG_USER_ONLY)) + int _newpsrpil=(val & PSR_PIL) >> 8; + if((_newpsrpil>env->psrpil)&& ((env->pil_in&15)>_newpsrpil)) { + env->psrpil = _newpsrpil; + cpu_check_irqs(env); + } else env->psrpil = _newpsrpil; +#else + env->psrpil = (val & PSR_PIL) >> 8; #endif - + env->psrs = (val & PSR_S)? 1 : 0; + env->psrps = (val & PSR_PS)? 1 : 0; #if !defined (TARGET_SPARC64) -#define PUT_PSR(env, val) do { int _tmp = val; \ - env->psr = _tmp & PSR_ICC; \ - env->psref = (_tmp & PSR_EF)? 1 : 0; \ - env->psrpil = (_tmp & PSR_PIL) >> 8; \ - env->psrs = (_tmp & PSR_S)? 1 : 0; \ - env->psrps = (_tmp & PSR_PS)? 1 : 0; \ - env->psret = (_tmp & PSR_ET)? 1 : 0; \ - cpu_set_cwp(env, _tmp & PSR_CWP); \ - CC_OP = CC_OP_FLAGS; \ - } while (0) -#else -#define PUT_PSR(env, val) do { int _tmp = val; \ - env->psr = _tmp & PSR_ICC; \ - env->psref = (_tmp & PSR_EF)? 1 : 0; \ - env->psrpil = (_tmp & PSR_PIL) >> 8; \ - env->psrs = (_tmp & PSR_S)? 1 : 0; \ - env->psrps = (_tmp & PSR_PS)? 1 : 0; \ - cpu_set_cwp(env, _tmp & PSR_CWP); \ - CC_OP = CC_OP_FLAGS; \ - } while (0) + env->psret = (val & PSR_ET)? 1 : 0; #endif + cpu_set_cwp(env, val & PSR_CWP); + CC_OP = CC_OP_FLAGS; +} #ifdef TARGET_SPARC64 #define GET_CCR(env) (((env->xcc >> 20) << 4) | ((env->psr & PSR_ICC) >> 20)) @@ -585,9 +587,6 @@ static inline void cpu_clone_regs(CPUState *env, target_ulong newsp) #include "cpu-all.h" #include "exec-all.h" -/* sum4m.c, sun4u.c */ -void cpu_check_irqs(CPUSPARCState *env); - #ifdef TARGET_SPARC64 /* sun4u.c */ void cpu_tick_set_count(void *opaque, uint64_t count); ^ permalink raw reply related [flat|nested] 4+ messages in thread
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2009-08-12 16:28 [Qemu-devel] [Patch] sparc32 remove an unnecessary cpu irq set Artyom Tarasenko
[not found] ` <b2fa41d60908121143tb46ceeehfa37bbc448e0eb5a@mail.gmail.com>
2009-08-13 15:44 ` Artyom Tarasenko
2009-08-13 19:33 ` Blue Swirl
2009-08-14 10:37 ` Artyom Tarasenko
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