[Qemu-devel] Re: target-sparc/TODO

[Blue Swirl <blauwirbel@gmail.com>]

On Mon, Aug 17, 2009 at 1:52 PM, Artyom
Tarasenko<atar4qemu@googlemail.com> wrote:
>> - Global register for regwptr, so that windowed registers can be
>> accessed directly
>
> looks like it's already implemented?

No, this means that a global register (TCG_AREG1) would be designated
as regwptr, so that the window registers (%o, %l, %i) would be defined
with:

cpu_wregs[i] = tcg_global_mem_new(TCG_AREG1, offsetof(...), name).

This would need some changes to cwp handling to support TCG_AREG1,
maybe also to TCG prologue.

Before TCG, this was difficult because the registers were taken by
cpu_T0, cpu_T1 and cpu_T2.

But it's not clear if this gives any performance gain, because
although window registers accesses may get faster (this is also not
certain because CPUstate should reside in cache), there is one host
register less available and that may mean more host memory accesses.

>> - Synthetic instructions
> Is it still open?

We already handle 'clr' and 'mov'. Code generation is not optimal, for
example arithmetic ops with constants/%g0 or things like wrpsr which
always does a XOR of the parameters even if they are constants or %g0.

>> - Hardware breakpoint/watchpoint support
> Is it still open?

I think support for these was only found in a few CPU models, so they
are not used much. Nobody has also shown any interest or provided a
test case.