From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MeaGu-0003ji-Jb for qemu-devel@nongnu.org; Fri, 21 Aug 2009 15:59:36 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MeaGq-0003jU-55 for qemu-devel@nongnu.org; Fri, 21 Aug 2009 15:59:36 -0400 Received: from [199.232.76.173] (port=49941 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MeaGp-0003jR-Te for qemu-devel@nongnu.org; Fri, 21 Aug 2009 15:59:31 -0400 Received: from mail-fx0-f211.google.com ([209.85.220.211]:49588) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MeaGp-0000Uf-FB for qemu-devel@nongnu.org; Fri, 21 Aug 2009 15:59:31 -0400 Received: by fxm7 with SMTP id 7so749422fxm.34 for ; Fri, 21 Aug 2009 12:59:30 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: References: From: Blue Swirl Date: Fri, 21 Aug 2009 22:59:10 +0300 Message-ID: Subject: Re: [Qemu-devel] [PATCH 0/5] piix_pci cleanup Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Juan Quintela Cc: qemu-devel@nongnu.org On Fri, Aug 21, 2009 at 8:36 PM, Juan Quintela wrote: > Hi > > This series: > - split piix4 from piix_pci. =C2=A0The only shared code where piix_save/l= oad, i.e. > =C2=A0almost nothing. =C2=A0Once there, compile piix4.o only for mips (it= was not used > =C2=A0anywhere else). > - Move global variables to PCII440FXState. =C2=A0Nice and clean until.... > - pci_irq_levels: This is great: > =C2=A0* it is saved/loaded from i440fx > =C2=A0* it is cleaned during reset in piix3 > =C2=A0* it is used in piix3_set_irq, that don't receive neither i440fx no= r > =C2=A0 =C2=A0piix state, it needs to be a global variable. (created a glo= bal link > =C2=A0 =C2=A0until a better solution appear). > > I looked where to "hide" pci_irq_levels and piix3_dev (both needed in > piix3_set_irq), and didn't found where to pass them, out of: > - hack i8259 to hide it into PicState2 (that one got passed through the p= ic) > =C2=A0ugly for words, but will work > - try to add at setup_irq time, but at that point we have: > =C2=A0* opaque -> pci_dev of device that we are working with > =C2=A0* from there we can get to the bus that the device is attached to, > =C2=A0 =C2=A0but no way to go from there to the Host bridge (that is what= we wanted > =C2=A0 =C2=A0in the 1st place) > > Notice that this is needed for both pc and mips_malta.c > > Ideas on where to hide a pci_dev inside a bus? pci_set_irq_fn should take an opaque state pointer (given at pci_register_bus time): typedef void (*pci_set_irq_fn)(void *opaque, qemu_irq *pic, int irq_num, int level); PCIBus *pci_register_bus(DeviceState *parent, const char *name, pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, qemu_irq *pic, void *irq_opaque, int devfn_min, int nirq);