From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MiWfa-0000Jh-Nh for qemu-devel@nongnu.org; Tue, 01 Sep 2009 12:57:22 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MiWfV-0000Bw-Uq for qemu-devel@nongnu.org; Tue, 01 Sep 2009 12:57:22 -0400 Received: from [199.232.76.173] (port=35668 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MiWfV-0000BF-Is for qemu-devel@nongnu.org; Tue, 01 Sep 2009 12:57:17 -0400 Received: from mail-ew0-f223.google.com ([209.85.219.223]:60927) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MiWfV-00026l-1L for qemu-devel@nongnu.org; Tue, 01 Sep 2009 12:57:17 -0400 Received: by ewy23 with SMTP id 23so132527ewy.8 for ; Tue, 01 Sep 2009 09:57:16 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <1251822154-5423-1-git-send-email-glommer@redhat.com> References: <1251822154-5423-1-git-send-email-glommer@redhat.com> From: Blue Swirl Date: Tue, 1 Sep 2009 19:56:56 +0300 Message-ID: Subject: Re: [Qemu-devel] [PATCH] re-set rtc date on reset handler Content-Type: text/plain; charset=UTF-8 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Glauber Costa Cc: aliguori@us.ibm.com, qemu-devel@nongnu.org On Tue, Sep 1, 2009 at 7:22 PM, Glauber Costa wrote: > guests without a stable timesource such as kvm-clock will grab the wallclock > from our rtc chip. However, we only sync the date when we first launch qemu. > If a guest goes through a series of reboot cycles, it will slowly see time > getting far behind the host. > > The proposal of this patch is to set the date to host clock again in the reset > handler. With this patch, I see a Fedora guest keeping its clock in sync upon > an ulimited number of reboots. A different approach is used in m48t59.c: the guest clock is generated directly from host clock without any timers and only a fixed offset (to account for time when guest was stopped) is added, so the clock will always in sync.