From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1MrvX9-0003EG-8V for qemu-devel@nongnu.org; Sun, 27 Sep 2009 11:19:31 -0400 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1MrvX4-0003D1-Jc for qemu-devel@nongnu.org; Sun, 27 Sep 2009 11:19:30 -0400 Received: from [199.232.76.173] (port=60508 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1MrvX4-0003Cw-EA for qemu-devel@nongnu.org; Sun, 27 Sep 2009 11:19:26 -0400 Received: from mail-fx0-f214.google.com ([209.85.220.214]:42702) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1MrvX4-0003Wa-2L for qemu-devel@nongnu.org; Sun, 27 Sep 2009 11:19:26 -0400 Received: by fxm10 with SMTP id 10so3234143fxm.8 for ; Sun, 27 Sep 2009 08:19:25 -0700 (PDT) MIME-Version: 1.0 In-Reply-To: <20090927142422.GB24851@redhat.com> References: <4ABF4110.80300@redhat.com> <20090927114459.GA24031@redhat.com> <4ABF52A5.5080409@redhat.com> <20090927120041.GB24031@redhat.com> <4ABF585D.7000201@redhat.com> <20090927140841.GA24769@redhat.com> <4ABF7359.8050404@redhat.com> <20090927142129.GA24851@redhat.com> <20090927142422.GB24851@redhat.com> From: Blue Swirl Date: Sun, 27 Sep 2009 18:19:05 +0300 Message-ID: Subject: Re: [Qemu-devel] Re: [PATCHv2] qemu: target library, use it in msix Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: "Michael S. Tsirkin" Cc: Avi Kivity , qemu-devel@nongnu.org On Sun, Sep 27, 2009 at 5:24 PM, Michael S. Tsirkin wrote: > On Sun, Sep 27, 2009 at 04:21:29PM +0200, Michael S. Tsirkin wrote: >> On Sun, Sep 27, 2009 at 04:14:49PM +0200, Avi Kivity wrote: >> > On 09/27/2009 04:08 PM, Michael S. Tsirkin wrote: >> >> >> >> >> >>>> In practice, the only user is now msix and it does not. =C2=A0It ha= s 0x1000 >> >>>> as a constant parameter. =C2=A0For target_phys_addr_t users if we e= ver have >> >>>> them, we'll just add target_phys_page_align. Generally it's unusual= for >> >>>> devices to care about size of target physical page. >> >>>> >> >>>> >> >>> I'd fill better with uint64_t, at least that won't truncate. >> >>> >> >> Doesn't naming it target_page_align32 address this concern? >> >> >> > >> > How can the caller (except in your special case) know if it has a >> > quantity that will fit in 32 bits? >> >> It's actually not unusual for devices to limit addressing to 32 bit, wha= tever >> the bus supports. > > I would say that devices normally have a specific addressing, and should > not be using target specific types at all. =C2=A0This alignment to target > page size is actually an unusual thing. Actually, AFAICT MSI-X spec (6.8.2, from the MSI entry in Wikipedia) only requires a QWORD alignment. There is some blurb about 4k alignment, but I think it only describes how software should use the structure. If this is the case, we could drop the whole target page stuff.