From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N75M8-0005DX-4i for qemu-devel@nongnu.org; Sun, 08 Nov 2009 05:50:48 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N75M3-00058I-Lt for qemu-devel@nongnu.org; Sun, 08 Nov 2009 05:50:47 -0500 Received: from [199.232.76.173] (port=44948 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N75M3-000583-Eq for qemu-devel@nongnu.org; Sun, 08 Nov 2009 05:50:43 -0500 Received: from mail-yx0-f188.google.com ([209.85.210.188]:44366) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N75M2-0002hB-St for qemu-devel@nongnu.org; Sun, 08 Nov 2009 05:50:43 -0500 Received: by yxe26 with SMTP id 26so1921621yxe.4 for ; Sun, 08 Nov 2009 02:50:41 -0800 (PST) MIME-Version: 1.0 From: Blue Swirl Date: Sun, 8 Nov 2009 12:50:21 +0200 Message-ID: Content-Type: text/plain; charset=UTF-8 Subject: [Qemu-devel] [PATCH, RFC] mips: fix cpu_reset memory leak List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Aurelien Jarno , qemu-devel Both mmu_init() and mvp_init() allocate structures, so call cpu_mips_register only when creating a CPU. In addition, maybe some of the some of the field initialization stuff in cpu_mips_register, mmu_init, mvp_init, fpu_init etc. should be moved to cpu_reset instead, in case the fields should be reset to original values during CPU reset. Maximally only the env->mvp etc. structure allocation would be left to cpu_mips_register. This is the minimal version, but it may be incorrect. Comments? Signed-off-by: Blue Swirl --- target-mips/translate.c | 2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-mips/translate.c b/target-mips/translate.c index 58f483f..738efb7 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -8601,6 +8601,7 @@ CPUMIPSState *cpu_mips_init (const char *cpu_model) cpu_exec_init(env); env->cpu_model_str = cpu_model; + cpu_mips_register(env, def); mips_tcg_init(); cpu_reset(env); qemu_init_vcpu(env); @@ -8654,7 +8655,6 @@ void cpu_reset (CPUMIPSState *env) env->hflags = MIPS_HFLAG_CP0; #endif env->exception_index = EXCP_NONE; - cpu_mips_register(env, env->cpu_model); } void gen_pc_load(CPUState *env, TranslationBlock *tb, -- 1.6.2.4