From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N7b0U-0007ru-FL for qemu-devel@nongnu.org; Mon, 09 Nov 2009 15:38:34 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N7b0Q-0007qy-Tp for qemu-devel@nongnu.org; Mon, 09 Nov 2009 15:38:34 -0500 Received: from [199.232.76.173] (port=48907 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N7b0Q-0007qv-Qs for qemu-devel@nongnu.org; Mon, 09 Nov 2009 15:38:30 -0500 Received: from mail-yx0-f188.google.com ([209.85.210.188]:55925) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N7b0Q-0000QM-Hc for qemu-devel@nongnu.org; Mon, 09 Nov 2009 15:38:30 -0500 Received: by yxe26 with SMTP id 26so2881197yxe.4 for ; Mon, 09 Nov 2009 12:38:29 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <4AF80CFF.1090607@redhat.com> References: <4AF4ACA5.2090701@redhat.com> <4AF7DC02.2070308@redhat.com> <4AF80CFF.1090607@redhat.com> From: Blue Swirl Date: Mon, 9 Nov 2009 22:38:09 +0200 Message-ID: Subject: Re: [Qemu-devel] [sneak preview] major scsi overhaul Content-Type: text/plain; charset=UTF-8 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Avi Kivity Cc: Gerd Hoffmann , "qemu-devel@nongnu.org" On Mon, Nov 9, 2009 at 2:37 PM, Avi Kivity wrote: > On 11/09/2009 11:08 AM, Gerd Hoffmann wrote: >> >>> You are also moving the compilation to Makefile.hw, which is not >>> exactly an improvement. Is this needed because of the QEMUIOVector >>> stuff? >> >> Almost correct ;) >> >> It is because of QEMUSGList which drags in a target_phys_addr_t >> dependency. > > As Michael notes, devices have physical address sizes independent of the > target platform; a PCI device that supports 64-bit addresses can be plugged > into a motherboard that supports 32-bit address bus processors. True. But I think the solution is not to make all buses maximum width, but support multiple buses with width translation in between. > We can fix this in several ways: > - creating QEMUSG64List and QEMUSG32List (and typedefing PCISGList to the > former) > - making QEMUSGList always use 64-bit addresses since it will almost always > be used with devices (which are often 64-bit capable) > - making target_phys_addr_t always 64-bit (which loses some performance with > 32-on-32 emulation) > - others? We could improve the compilation system so that on 64 bit hosts the benefit of single size target_phys_addr_t results in compiling the files only once.