[Qemu-devel] Re: [PATCH] sparc32 irq clearing (guest Solaris performance+NetBSD) fix

[Blue Swirl <blauwirbel@gmail.com>]

On Sat, Nov 14, 2009 at 3:03 AM, Artyom Tarasenko
<atar4qemu@googlemail.com> wrote:
> According to NCR89C105 documentation
> http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105.txt
>
> Interrupts are cleared by disabling and then re-enabling them.
> This patch implements the specified behaviour. The most visible effects:

I think the current version also implements this behaviour. The
difference is that now we clear on disable, with your version, the
interrupts are cleared when re-enabling them.

With the current version, the interrupts which arrived after getting
cleared during disable but before re-enabling become visible after
re-enabling. It looks like esp driver in Aurora 1.0, 2.0 and 2.1
depend on this.

> - NetBSD 1.3.3 - 1.5.3 boots successfully

I didn't find those even on ftp.netbsd.org, the first I have is 1.6.
Thus I could not test if any of the changes I did had any positive
effect except if some test failed.

> - Solaris 2.5.1 - 7 boots ~1500 times faster (~20 seconds instead of ~8 hours)
>
> Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>
> ---
> diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c
> index 9680392..779c661 100644
> --- a/hw/slavio_intctl.c
> +++ b/hw/slavio_intctl.c
> @@ -177,19 +177,19 @@ static void slavio_intctlm_mem_writel(void
> *opaque, target_phys_addr_t addr,
>     saddr = addr >> 2;
>     DPRINTF("write system reg 0x" TARGET_FMT_plx " = %x\n", addr, val);
>     switch (saddr) {
> -    case 2: // clear (enable)
> +    case 2: // clear (enable, clear formerly disabled pending)
>         // Force clear unused bits
>         val &= MASTER_IRQ_MASK;
> +        s->intregm_pending &= (s->intregm_disabled & val);

This looks buggy, the AND operation will clear a lot of bits unrelated
to val. I think you are missing a ~ here. I tried a few combinations,
but none of them passed my tests.

>         s->intregm_disabled &= ~val;
>         DPRINTF("Enabled master irq mask %x, curmask %x\n", val,
>                 s->intregm_disabled);
>         slavio_check_interrupts(s, 1);
>         break;
> -    case 3: // set (disable, clear pending)
> +    case 3: // set (disable, do not clear pending)
>         // Force clear unused bits
>         val &= MASTER_IRQ_MASK;
>         s->intregm_disabled |= val;
> -        s->intregm_pending &= ~val;

Here
s->intregm_pending &= ~s->intregm_disabled;
would also pass my tests. Does that change anything?

>         slavio_check_interrupts(s, 1);
>         DPRINTF("Disabled master irq mask %x, curmask %x\n", val,
>                 s->intregm_disabled);
>