From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1N9KWd-0008Cu-UY for qemu-devel@nongnu.org; Sat, 14 Nov 2009 10:26:55 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1N9KWY-0008CS-G5 for qemu-devel@nongnu.org; Sat, 14 Nov 2009 10:26:54 -0500 Received: from [199.232.76.173] (port=48242 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1N9KWY-0008CP-A7 for qemu-devel@nongnu.org; Sat, 14 Nov 2009 10:26:50 -0500 Received: from mail-yw0-f176.google.com ([209.85.211.176]:38298) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1N9KWY-0002nv-0W for qemu-devel@nongnu.org; Sat, 14 Nov 2009 10:26:50 -0500 Received: by ywh6 with SMTP id 6so3609304ywh.4 for ; Sat, 14 Nov 2009 07:26:49 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: From: Blue Swirl Date: Sat, 14 Nov 2009 17:26:29 +0200 Message-ID: Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable Subject: [Qemu-devel] Re: [PATCH] sparc32 irq clearing (guest Solaris performance+NetBSD) fix List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Artyom Tarasenko Cc: qemu-devel On Sat, Nov 14, 2009 at 3:03 AM, Artyom Tarasenko wrote: > According to NCR89C105 documentation > http://www.ibiblio.org/pub/historic-linux/early-ports/Sparc/NCR/NCR89C105= .txt > > Interrupts are cleared by disabling and then re-enabling them. > This patch implements the specified behaviour. The most visible effects: I think the current version also implements this behaviour. The difference is that now we clear on disable, with your version, the interrupts are cleared when re-enabling them. With the current version, the interrupts which arrived after getting cleared during disable but before re-enabling become visible after re-enabling. It looks like esp driver in Aurora 1.0, 2.0 and 2.1 depend on this. > - NetBSD 1.3.3 - 1.5.3 boots successfully I didn't find those even on ftp.netbsd.org, the first I have is 1.6. Thus I could not test if any of the changes I did had any positive effect except if some test failed. > - Solaris 2.5.1 - 7 boots ~1500 times faster (~20 seconds instead of ~8 h= ours) > > Signed-off-by: Artyom Tarasenko > --- > diff --git a/hw/slavio_intctl.c b/hw/slavio_intctl.c > index 9680392..779c661 100644 > --- a/hw/slavio_intctl.c > +++ b/hw/slavio_intctl.c > @@ -177,19 +177,19 @@ static void slavio_intctlm_mem_writel(void > *opaque, target_phys_addr_t addr, > =C2=A0 =C2=A0 saddr =3D addr >> 2; > =C2=A0 =C2=A0 DPRINTF("write system reg 0x" TARGET_FMT_plx " =3D %x\n", a= ddr, val); > =C2=A0 =C2=A0 switch (saddr) { > - =C2=A0 =C2=A0case 2: // clear (enable) > + =C2=A0 =C2=A0case 2: // clear (enable, clear formerly disabled pending) > =C2=A0 =C2=A0 =C2=A0 =C2=A0 // Force clear unused bits > =C2=A0 =C2=A0 =C2=A0 =C2=A0 val &=3D MASTER_IRQ_MASK; > + =C2=A0 =C2=A0 =C2=A0 =C2=A0s->intregm_pending &=3D (s->intregm_disabled= & val); This looks buggy, the AND operation will clear a lot of bits unrelated to val. I think you are missing a ~ here. I tried a few combinations, but none of them passed my tests. > =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->intregm_disabled &=3D ~val; > =C2=A0 =C2=A0 =C2=A0 =C2=A0 DPRINTF("Enabled master irq mask %x, curmask = %x\n", val, > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->intregm_disabl= ed); > =C2=A0 =C2=A0 =C2=A0 =C2=A0 slavio_check_interrupts(s, 1); > =C2=A0 =C2=A0 =C2=A0 =C2=A0 break; > - =C2=A0 =C2=A0case 3: // set (disable, clear pending) > + =C2=A0 =C2=A0case 3: // set (disable, do not clear pending) > =C2=A0 =C2=A0 =C2=A0 =C2=A0 // Force clear unused bits > =C2=A0 =C2=A0 =C2=A0 =C2=A0 val &=3D MASTER_IRQ_MASK; > =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->intregm_disabled |=3D val; > - =C2=A0 =C2=A0 =C2=A0 =C2=A0s->intregm_pending &=3D ~val; Here s->intregm_pending &=3D ~s->intregm_disabled; would also pass my tests. Does that change anything? > =C2=A0 =C2=A0 =C2=A0 =C2=A0 slavio_check_interrupts(s, 1); > =C2=A0 =C2=A0 =C2=A0 =C2=A0 DPRINTF("Disabled master irq mask %x, curmask= %x\n", val, > =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 =C2=A0 s->intregm_disabl= ed); >