From: Blue Swirl <blauwirbel@gmail.com>
To: "Igor V. Kovalenko" <igor.v.kovalenko@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH 2/9] sparc64: add PSR and PIL to cpu state dump
Date: Wed, 6 Jan 2010 15:31:54 +0000 [thread overview]
Message-ID: <f43fc5581001060731j19b338e9k83dceced3436bc0a@mail.gmail.com> (raw)
In-Reply-To: <20100105231912.6526.44123.stgit@skyserv>
On Tue, Jan 5, 2010 at 11:19 PM, Igor V. Kovalenko
<igor.v.kovalenko@gmail.com> wrote:
> From: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
>
> Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
> ---
> target-sparc/helper.c | 1 +
> 1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/target-sparc/helper.c b/target-sparc/helper.c
> index a06923a..0f0e583 100644
> --- a/target-sparc/helper.c
> +++ b/target-sparc/helper.c
> @@ -1452,6 +1452,7 @@ void cpu_dump_state(CPUState *env, FILE *f,
> #ifdef TARGET_SPARC64
> cpu_fprintf(f, "pstate: 0x%08x ccr: 0x%02x asi: 0x%02x tl: %d fprs: %d\n",
> env->pstate, GET_CCR(env), env->asi, env->tl, env->fprs);
> + cpu_fprintf(f, "psr: 0x%08x pil=%x\n", GET_PSR(env), env->psrpil);
PSR does not exist on Sparc64, instead we have separate registers,
like VER, CWP and CCR. PIL part is OK.
next prev parent reply other threads:[~2010-01-06 15:32 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2010-01-05 23:19 [Qemu-devel] [PATCH 0/9] sparc64: tick timers Igor V. Kovalenko
2010-01-05 23:19 ` [Qemu-devel] [PATCH 1/9] sparc64: trace pstate and global register set changes Igor V. Kovalenko
2010-01-06 15:24 ` Blue Swirl
2010-01-05 23:19 ` [Qemu-devel] [PATCH 2/9] sparc64: add PSR and PIL to cpu state dump Igor V. Kovalenko
2010-01-06 15:31 ` Blue Swirl [this message]
2010-01-05 23:19 ` [Qemu-devel] [PATCH 3/9] sparc64: use helper_wrpil to check pending irq on write Igor V. Kovalenko
2010-01-06 15:41 ` Blue Swirl
2010-01-05 23:19 ` [Qemu-devel] [PATCH 4/9] sparc64: check for pending irq when pil, pstate or softint is changed Igor V. Kovalenko
2010-01-06 15:54 ` Blue Swirl
2010-01-05 23:19 ` [Qemu-devel] [PATCH 5/9] sparc64: add macros to deal with softint and timer interrupt Igor V. Kovalenko
2010-01-06 15:58 ` Blue Swirl
2010-01-05 23:19 ` [Qemu-devel] [PATCH 6/9] sparc64: clear exception_index with -1 value Igor V. Kovalenko
2010-01-06 17:36 ` Blue Swirl
2010-01-06 23:29 ` Artyom Tarasenko
2010-01-06 23:57 ` Igor Kovalenko
2010-01-07 20:05 ` Blue Swirl
2010-01-05 23:19 ` [Qemu-devel] [PATCH 7/9] sparc64: move cpu_interrupts_enabled to cpu.h Igor V. Kovalenko
2010-01-05 23:19 ` [Qemu-devel] [PATCH 8/9] sparc64: interrupt trap handling Igor V. Kovalenko
2010-01-06 17:00 ` Blue Swirl
2010-01-07 17:24 ` Igor Kovalenko
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