From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NSyc7-0001Yr-Dc for qemu-devel@nongnu.org; Thu, 07 Jan 2010 15:05:47 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NSyc2-0001S4-LE for qemu-devel@nongnu.org; Thu, 07 Jan 2010 15:05:46 -0500 Received: from [199.232.76.173] (port=38128 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NSyc2-0001Rs-BP for qemu-devel@nongnu.org; Thu, 07 Jan 2010 15:05:42 -0500 Received: from mail-pz0-f188.google.com ([209.85.222.188]:35373) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NSyc1-0000Hq-Me for qemu-devel@nongnu.org; Thu, 07 Jan 2010 15:05:42 -0500 Received: by pzk26 with SMTP id 26so10248356pzk.4 for ; Thu, 07 Jan 2010 12:05:40 -0800 (PST) MIME-Version: 1.0 In-Reply-To: References: <20100105231558.6526.44483.stgit@skyserv> <20100105231933.6526.79032.stgit@skyserv> From: Blue Swirl Date: Thu, 7 Jan 2010 20:05:20 +0000 Message-ID: Subject: Re: [Qemu-devel] [PATCH 6/9] sparc64: clear exception_index with -1 value Content-Type: multipart/mixed; boundary=001636b14d155f2002047c989840 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Igor Kovalenko Cc: qemu-devel@nongnu.org, Artyom Tarasenko --001636b14d155f2002047c989840 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable On Wed, Jan 6, 2010 at 11:57 PM, Igor Kovalenko wrote: > On Thu, Jan 7, 2010 at 2:29 AM, Artyom Tarasenko > wrote: >> What's the effect of the patch? Don't we need it for sparc32 too? The >> code looks similar. >> >> 2010/1/6 Blue Swirl : >>> Thanks, applied. >>> >>> On Tue, Jan 5, 2010 at 11:19 PM, Igor V. Kovalenko >>> wrote: >>>> From: Igor V. Kovalenko >>>> >>>> Signed-off-by: Igor V. Kovalenko >>>> --- >>>> =C2=A0target-sparc/op_helper.c | =C2=A0 =C2=A02 +- >>>> =C2=A01 files changed, 1 insertions(+), 1 deletions(-) >>>> >>>> diff --git a/target-sparc/op_helper.c b/target-sparc/op_helper.c >>>> index b1978cb..94f1c7a 100644 >>>> --- a/target-sparc/op_helper.c >>>> +++ b/target-sparc/op_helper.c >>>> @@ -3535,7 +3535,7 @@ void do_interrupt(CPUState *env) >>>> =C2=A0 =C2=A0 env->tbr |=3D ((env->tl > 1) ? 1 << 14 : 0) | (intno << = 5); >>>> =C2=A0 =C2=A0 env->pc =3D env->tbr; >>>> =C2=A0 =C2=A0 env->npc =3D env->pc + 4; >>>> - =C2=A0 =C2=A0env->exception_index =3D 0; >>>> + =C2=A0 =C2=A0env->exception_index =3D -1; >>>> =C2=A0} >>>> =C2=A0#else >>>> =C2=A0#ifdef DEBUG_PCALL > > Right, but that's out of scope for this changeset. > > In fact sparc32 should have the same issue, as well as alpha, s390 and > sh4. Check in cpu_exec() for valid exception_index is "greater or > equal to zero" so all those targets should be corrected. On sh4 we > even check for "invalid value of exception_index is -1" Thanks, I applied the fix for Sparc32. Here's also an untested fix for other architectures. --001636b14d155f2002047c989840 Content-Type: application/x-patch; name="0001-Fix-incorrect-exception_index-use.patch" Content-Disposition: attachment; filename="0001-Fix-incorrect-exception_index-use.patch" Content-Transfer-Encoding: base64 X-Attachment-Id: f_g45yvypo0 RnJvbSBjOTNlMWFjNGI4YTg2MmZjMWE1OGNkYjMzYmIwN2E1MWM1YjMwNzMzIE1vbiBTZXAgMTcg MDA6MDA6MDAgMjAwMQpGcm9tOiBCbHVlIFN3aXJsIDxibGF1d2lyYmVsQGdtYWlsLmNvbT4KRGF0 ZTogVGh1LCA3IEphbiAyMDEwIDIwOjAyOjEyICswMDAwClN1YmplY3Q6IFtQQVRDSF0gRml4IGlu Y29ycmVjdCBleGNlcHRpb25faW5kZXggdXNlCgplbnYtPmV4Y2VwdGlvbl9pbmRleCBzaG91bGQg YmUgY2xlYXJlZCB3aXRoIC0xLCBub3QgMC4KClNlZSBhbHNvIDgyMWIxOWZlOTIzYWM0OWEyNGNk YjRhZjkwMjU4NGZkZDAxOWNlZTYuCgpTcG90dGVkIGJ5IElnb3IgS292YWxlbmtvLgoKU2lnbmVk LW9mZi1ieTogQmx1ZSBTd2lybCA8YmxhdXdpcmJlbEBnbWFpbC5jb20+Ci0tLQogdGFyZ2V0LWFs cGhhL2hlbHBlci5jIHwgICAgMiArLQogdGFyZ2V0LXMzOTB4L2t2bS5jICAgIHwgICAgNCArKy0t CiB0YXJnZXQtc2g0L2hlbHBlci5jICAgfCAgICAyICstCiAzIGZpbGVzIGNoYW5nZWQsIDQgaW5z ZXJ0aW9ucygrKSwgNCBkZWxldGlvbnMoLSkKCmRpZmYgLS1naXQgYS90YXJnZXQtYWxwaGEvaGVs cGVyLmMgYi90YXJnZXQtYWxwaGEvaGVscGVyLmMKaW5kZXggYmU3ZDM3Yi4uMWUwYmM0YSAxMDA2 NDQKLS0tIGEvdGFyZ2V0LWFscGhhL2hlbHBlci5jCisrKyBiL3RhcmdldC1hbHBoYS9oZWxwZXIu YwpAQCAtNDY3LDcgKzQ2Nyw3IEBAIHZvaWQgZG9faW50ZXJydXB0IChDUFVTdGF0ZSAqZW52KQog CiAgICAgZW52LT5pcHJbSVBSX0VYQ19BRERSXSA9IGVudi0+cGMgfCAxOwogICAgIGV4Y3AgPSBl bnYtPmV4Y2VwdGlvbl9pbmRleDsKLSAgICBlbnYtPmV4Y2VwdGlvbl9pbmRleCA9IDA7CisgICAg ZW52LT5leGNlcHRpb25faW5kZXggPSAtMTsKICAgICBlbnYtPmVycm9yX2NvZGUgPSAwOwogICAg IC8qIFhYWDogZGlzYWJsZSBpbnRlcnJ1cHRzIGFuZCBtZW1vcnkgbWFwcGluZyAqLwogICAgIGlm IChlbnYtPmlwcltJUFJfUEFMX0JBU0VdICE9IC0xVUxMKSB7CmRpZmYgLS1naXQgYS90YXJnZXQt czM5MHgva3ZtLmMgYi90YXJnZXQtczM5MHgva3ZtLmMKaW5kZXggMDk5MjU2My4uMDE5OWE2NSAx MDA2NDQKLS0tIGEvdGFyZ2V0LXMzOTB4L2t2bS5jCisrKyBiL3RhcmdldC1zMzkweC9rdm0uYwpA QCAtMTg2LDcgKzE4Niw3IEBAIHN0YXRpYyB2b2lkIGt2bV9zMzkwX2ludGVycnVwdF9pbnRlcm5h bChDUFVTdGF0ZSAqZW52LCBpbnQgdHlwZSwgdWludDMyX3QgcGFybSwKICAgICB9CiAKICAgICBl bnYtPmhhbHRlZCA9IDA7Ci0gICAgZW52LT5leGNlcHRpb25faW5kZXggPSAwOworICAgIGVudi0+ ZXhjZXB0aW9uX2luZGV4ID0gLTE7CiAKICAgICBrdm1pbnQudHlwZSA9IHR5cGU7CiAgICAga3Zt aW50LnBhcm0gPSBwYXJtOwpAQCAtMzI1LDcgKzMyNSw3IEBAIHN0YXRpYyBpbnQgczM5MF9jcHVf cmVzdGFydChDUFVTdGF0ZSAqZW52KQogewogICAgIGt2bV9zMzkwX2ludGVycnVwdChlbnYsIEtW TV9TMzkwX1JFU1RBUlQsIDApOwogICAgIGVudi0+aGFsdGVkID0gMDsKLSAgICBlbnYtPmV4Y2Vw dGlvbl9pbmRleCA9IDA7CisgICAgZW52LT5leGNlcHRpb25faW5kZXggPSAtMTsKICAgICBxZW11 X2NwdV9raWNrKGVudik7CiAgICAgZHByaW50ZigiRE9ORTogU0lHUCBjcHUgcmVzdGFydDogJXBc biIsIGVudik7CiAgICAgcmV0dXJuIDA7CmRpZmYgLS1naXQgYS90YXJnZXQtc2g0L2hlbHBlci5j IGIvdGFyZ2V0LXNoNC9oZWxwZXIuYwppbmRleCAwODhkMzZhLi44Yzk0NTY0IDEwMDY0NAotLS0g YS90YXJnZXQtc2g0L2hlbHBlci5jCisrKyBiL3RhcmdldC1zaDQvaGVscGVyLmMKQEAgLTM4LDcg KzM4LDcgQEAgaW50IGNwdV9zaDRfaGFuZGxlX21tdV9mYXVsdChDUFVTdGF0ZSAqIGVudiwgdGFy Z2V0X3Vsb25nIGFkZHJlc3MsIGludCBydywKIAkJCSAgICAgaW50IG1tdV9pZHgsIGludCBpc19z b2Z0bW11KQogewogICAgIGVudi0+dGVhID0gYWRkcmVzczsKLSAgICBlbnYtPmV4Y2VwdGlvbl9p bmRleCA9IDA7CisgICAgZW52LT5leGNlcHRpb25faW5kZXggPSAtMTsKICAgICBzd2l0Y2ggKHJ3 KSB7CiAgICAgY2FzZSAwOgogICAgICAgICBlbnYtPmV4Y2VwdGlvbl9pbmRleCA9IDB4MGEwOwot LSAKMS41LjYuNQoK --001636b14d155f2002047c989840--