From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NUnjs-0000r1-2D for qemu-devel@nongnu.org; Tue, 12 Jan 2010 15:53:20 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NUnjn-0000qL-Cy for qemu-devel@nongnu.org; Tue, 12 Jan 2010 15:53:19 -0500 Received: from [199.232.76.173] (port=39360 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NUnjn-0000qI-9K for qemu-devel@nongnu.org; Tue, 12 Jan 2010 15:53:15 -0500 Received: from mx20.gnu.org ([199.232.41.8]:22078) by monty-python.gnu.org with esmtps (TLS-1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.60) (envelope-from ) id 1NUnjj-0001Mf-Iy for qemu-devel@nongnu.org; Tue, 12 Jan 2010 15:53:14 -0500 Received: from mail-pw0-f43.google.com ([209.85.160.43]) by mx20.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NUnjh-0008RR-6q for qemu-devel@nongnu.org; Tue, 12 Jan 2010 15:53:09 -0500 Received: by pwj11 with SMTP id 11so2872300pwj.2 for ; Tue, 12 Jan 2010 12:52:51 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <9EE70531-F281-4783-800F-EB83C5C66EA2@suse.de> References: <1263297526-13518-1-git-send-email-agraf@suse.de> <9EE70531-F281-4783-800F-EB83C5C66EA2@suse.de> From: Blue Swirl Date: Tue, 12 Jan 2010 20:52:31 +0000 Message-ID: Subject: Re: [Qemu-devel] [PATCH 0/9] PPC NewWorld fixery v3 Content-Type: text/plain; charset=UTF-8 List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Alexander Graf Cc: The OpenBIOS Mailinglist , QEMU Developers On Tue, Jan 12, 2010 at 8:34 PM, Alexander Graf wrote: > > On 12.01.2010, at 20:45, Blue Swirl wrote: > >> On Tue, Jan 12, 2010 at 11:58 AM, Alexander Graf wrote: >>> I'm trying to get the PPC64 system emulation target working finally. >>> While doing so, I ran into several issues, all related to PCI this time. >>> >>> This patchset fixes all the PCI config space access and PCI interrupt >>> mapping issues I've found on PPC64. Using this and a patched OpenBIOS >>> version, I can successfully access IDE devices and was booting a guest >>> into the shell from IDE using serial console. >>> >>> To leverage this patch, you also need a few patches to OpenBIOS. I'll >>> present them to the OpenBIOS list, but in general getting patches into >>> Qemu is harder than getting them into OpenBIOS. So I want to wait for >>> the review process here first. >>> >>> Find the OpenBIOS patch at: http://alex.csgraf.de/openbios-ppc-u3.patch >> >> About the OpenBIOS patch, could you move the PCI_INT_MAP defines to a >> PPC-specific header and make pci_host_set_interrupt_map() contents >> surrounded by #ifdef CONFIG_PPC (to make it empty function for other >> arches)? > > Well, other archs should be able to use the same code. If OpenBIOS knows how interrupts work for a particular device, it really should tell the OS about it too IMHO. I'm not so sure. Here's an example of a Sparc64 interrupt-map: Node 0xf005f9d4 bus-range: 00000001.00000001 scsi-initiator-id: 00000007 compatible: 70636931.3038652c.35303030.00706369 66mhz-capable: fast-back-to-back: devsel-speed: 00000001 class-code: 00060400 revision-id: 00000011 device-id: 00005000 vendor-id: 0000108e interrupt-map: 00010800.00000000.00000000.00000001.f005f1e0.00000021.00011000.00000000.00000000.00000001.f005f1e0.0000000f.00011800.00000000.00000000.00000001.f005f1e0.00000020 interrupt-map-mask: 00fff800.00000000.00000000.00000007 #interrupt-cells: 00000001 slot-names: 00000000 no-probe-list: '0' clock-frequency: 01f78a40 model: 'SUNW,simba' #address-cells: 00000003 #size-cells: 00000002 reg: 00000900.00000000.00000000.00000000.00000000 device_type: 'pci' name: 'pci'