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From: Blue Swirl <blauwirbel@gmail.com>
Date: Sat, 16 Jan 2010 08:47:06 +0000
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Subject: [Qemu-devel] Re: sparc32 do not clear interrupts when masking
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To: Artyom Tarasenko <atar4qemu@googlemail.com>
Cc: qemu-devel@nongnu.org, Artyom Tarasenko <atar4qemu@gmail.com>

On Sat, Jan 16, 2010 at 8:16 AM, Blue Swirl <blauwirbel@gmail.com> wrote:
> On Fri, Jan 15, 2010 at 10:37 PM, Artyom Tarasenko
> <atar4qemu@googlemail.com> wrote:
>> Don't clear interrupts on disabling, because
>> * Sun4M_SystemArchitecture_edited2.pdf doesn't describe
>> =C2=A0that masking or un-masking IRQ shall clear pending ones.
>>
>> * Field tests also show that SPARCstation-20 doesn't
>> =C2=A0clear them.
>
> Awesome work!
>
>> * The patch makes Solaris 2.5.1/2.6 boot ~1500 times
>> =C2=A0faster (~20 seconds instead of ~8 hours)
>
> Unfortunately there is some problem with the patch (or more likely
> there is some other bug that this uncovers), because all my Linux test
> now panic. NetBSD and OpenBSD are unaffected.
>
> For example, sparc-test:
> eth0: LANCE 52:54:00:12:34:56
> esp0: no command in esp_handle()
> Kernel panic - not syncing: esp_handle: current_SC =3D=3D penguin within =
interrupt!
> =C2=A0<0>Press L1-A to return to the boot prom
>
> The bug may be in ESP interrupt handling (or in the interrupt chain
> between ESP, DMA controller and interrupt controller) as the panic
> always happens in ESP probe.

In fact the bug was that OpenBIOS didn't clear ESP interrupts after
issuing commands, so the IRQ line was left raised which confused
Linux.