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From: Blue Swirl <blauwirbel@gmail.com>
To: Igor Kovalenko <igor.v.kovalenko@gmail.com>
Cc: qemu-devel@nongnu.org
Subject: Re: [Qemu-devel] [PATCH] sparc64: reimplement tick timers v2
Date: Wed, 20 Jan 2010 18:40:34 +0000	[thread overview]
Message-ID: <f43fc5581001201040m11f60445o1578a0751f16f3cb@mail.gmail.com> (raw)
In-Reply-To: <b2fa41d61001191424w701bc9dexbf39292287557a0f@mail.gmail.com>

On Tue, Jan 19, 2010 at 10:24 PM, Igor Kovalenko
<igor.v.kovalenko@gmail.com> wrote:
> On Tue, Jan 19, 2010 at 9:44 PM, Blue Swirl <blauwirbel@gmail.com> wrote:
>> On Mon, Jan 18, 2010 at 10:28 PM, Igor V. Kovalenko
>> <igor.v.kovalenko@gmail.com> wrote:
>>> From: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>
>>>
>>> sparc64 timer has tick counter which can be set and read,
>>> and tick compare value used as deadline to fire timer interrupt.
>>> The timer is not used as periodic timer, instead deadline
>>> is set each time new timer interrupt is needed.
>>
>> Does not compile:
>>
>>  CC    sparc64-softmmu/sun4u.o
>> cc1: warnings being treated as errors
>> /src/qemu/hw/sun4u.c: In function 'cpu_tick_set_count':
>> /src/qemu/hw/sun4u.c:467: error: implicit declaration of function
>> 'TIMER_DPRINTF'
>> make[1]: *** [sun4u.o] Error 1
>
> Sorry forgot the split out debugging piece. New v3 has all these
> comments addressed.
>
>> If I add the missing TIMER_DPRINTF, Linux still crashes:
>>
>> Memory: 117376k available (2136k kernel code, 664k data, 184k init)
>> [fffff80000000000,0000000007e80000]
>> SLUB: Genslabs=14, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
>> Hierarchical RCU implementation.
>> NR_IRQS:255
>> clocksource: mult[a0000] shift[16]
>> clockevent: mult[19999999] shift[32]
>> Console: colour dummy device 80x25
>> Unable to handle kernel NULL pointer dereference
>> tsk->{mm,active_mm}->context = 0000000000000000
>> tsk->{mm,active_mm}->pgd = fffff800006fdaa4
>>              \|/ ____ \|/
>>              "@'/ .. \`@"
>>              /_| \__/ |_\
>>                 \__U_/
>> swapper(0): Oops [#1]
>> TSTATE: 0000004480001607 TPC: 00000000006e32f4 TNPC: 00000000006e32f8
>> Y: 00000000    Not tainted
>> TPC: <calibrate_delay+0x94/0x2e0>
>
> Easy to reproduce here, and I still fail to find the reason for this crash.
> It looks like linux kernel loads zero values from memory while returning
> from timer softirq handler. Note this does not always happen at first timer
> interrupt inside calibrate_delay loop.

Maybe a bug with AG/MG/IG handling?

> I really want to see debug trace of all processed instructions, but
> qemu command line switch -singlestep does not really work for sparc64-softmmu
> and stepping through calibrate_delay does not seem to help at the moment.
> Any ideas on how to force all instructions after approx. 5000000 cpu
> cycles to be
> single stepped, so I get the trace in qemu.log ?

Fixing -singlestep should not be too difficult. :-)

For a quick hack, you could add a call to tb_flush() near the end of
cpu_exec() and hack gen_intermediate_code_internal() so that max_insns
is 1 (or 2 for delay slots?).

      reply	other threads:[~2010-01-20 18:41 UTC|newest]

Thread overview: 4+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-01-18 22:28 [Qemu-devel] [PATCH] sparc64: reimplement tick timers v2 Igor V. Kovalenko
2010-01-19 18:44 ` Blue Swirl
2010-01-19 22:24   ` Igor Kovalenko
2010-01-20 18:40     ` Blue Swirl [this message]

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