From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mailman by lists.gnu.org with tmda-scanned (Exim 4.43) id 1NXg94-0003l6-TJ for qemu-devel@nongnu.org; Wed, 20 Jan 2010 14:23:14 -0500 Received: from exim by lists.gnu.org with spam-scanned (Exim 4.43) id 1NXg90-0003fn-8O for qemu-devel@nongnu.org; Wed, 20 Jan 2010 14:23:14 -0500 Received: from [199.232.76.173] (port=42344 helo=monty-python.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1NXg8z-0003fV-Tm for qemu-devel@nongnu.org; Wed, 20 Jan 2010 14:23:10 -0500 Received: from mail-pz0-f186.google.com ([209.85.222.186]:42079) by monty-python.gnu.org with esmtp (Exim 4.60) (envelope-from ) id 1NXg8z-0001Ye-8A for qemu-devel@nongnu.org; Wed, 20 Jan 2010 14:23:09 -0500 Received: by pzk16 with SMTP id 16so3885210pzk.18 for ; Wed, 20 Jan 2010 11:23:08 -0800 (PST) MIME-Version: 1.0 In-Reply-To: <20100120161114.3bfdebca@doriath> References: <1264005551-12989-1-git-send-email-lcapitulino@redhat.com> <20100120161114.3bfdebca@doriath> From: Blue Swirl Date: Wed, 20 Jan 2010 19:22:48 +0000 Message-ID: Subject: Re: [Qemu-devel] [PATCH v2 0/5]: Convert pci_info() to QObject Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , To: Luiz Capitulino Cc: aliguori@us.ibm.com, mst@redhat.com, Markus Armbruster , qemu-devel@nongnu.org On Wed, Jan 20, 2010 at 6:11 PM, Luiz Capitulino w= rote: > On Wed, 20 Jan 2010 18:57:56 +0100 > Markus Armbruster wrote: > >> Luiz Capitulino writes: >> >> > =C2=A0Hi, >> > >> > =C2=A0This new version addresses Markus's comments. >> > >> > changelog >> > --------- >> > >> > V1 -> V2 >> > >> > - Make class_info's key 'desc' optional >> > - Better indentation >> > - Doc fixes >> > >> > V0 -> V1 >> > >> > - Coding style fixes >> > - Make 'BAR' and 'IRQ' keys lowercase >> > - Add 'irq' key to the documentation >> > >> > =C2=A0Thanks. >> >> Looks good, although one comment still applies: PATCH 3/5 regresses info >> pci, 4/5 and 5/5 fix it. =C2=A0Do we care? =C2=A0They're separate becaus= e they're >> untested. > > =C2=A0There are two problems here, which apply for those whom emulate > the hardware: > > 1. 'info pci' output will brake with git bisect > > 2. As the code is untested, it might be broken > > =C2=A0Only two 2 seems serious. > > =C2=A0Michael, does the sparc image on qemu.org have the hardware > in question (pci bridge)? Sparc64 has two Simba bridges, but currently they are broken so there are no devices behind them. In addition there should be a DEC 21154 bridge. There is no Sparc64 test image yet (very few Sparc32 machines did have any PCI and we don't emulate them), but you can test the output without any images: qemu-system-sparc64 -L pc-bios -S -monitor stdio QEMU 0.12.50 monitor - type 'help' for more information (qemu) info pci Bus 0, device 0, function 0: Host bridge: PCI device 108e:a000 id "" Bus 0, device 1, function 0: PCI bridge: PCI device 108e:5000 BUS 0. secondary bus 0. subordinate bus 0. IO range [0x0000, 0x0fff] memory range [0x00000000, 0x000fffff] prefetchable memory range [0x00000000, 0x000fffff] id "" Bus 0, device 1, function 1: PCI bridge: PCI device 108e:5000 BUS 0. secondary bus 0. subordinate bus 0. IO range [0x0000, 0x0fff] memory range [0x00000000, 0x000fffff] prefetchable memory range [0x00000000, 0x000fffff] id "" Bus 0, device 2, function 0: VGA controller: PCI device 1234:1111 BAR0: 32 bit prefetchable memory at 0xffffffffffffffff [0x007ffffe]. id "" Bus 0, device 3, function 0: Bridge: PCI device 108e:1000 BAR0: 32 bit memory at 0xffffffffffffffff [0x00fffffe]. BAR1: 32 bit memory at 0xffffffffffffffff [0x007ffffe]. id "" Bus 0, device 4, function 0: Ethernet controller: PCI device 10ec:8029 IRQ 0. BAR0: I/O at 0xffffffffffffffff [0x00fe]. id "" Bus 0, device 5, function 0: IDE controller: PCI device 1095:0646 IRQ 0. BAR0: I/O at 0xffffffffffffffff [0x0006]. BAR1: I/O at 0xffffffffffffffff [0x0002]. BAR2: I/O at 0xffffffffffffffff [0x0006]. BAR3: I/O at 0xffffffffffffffff [0x0002]. BAR4: I/O at 0xffffffffffffffff [0x000e]. id "" (qemu) c (qemu) info pci Bus 0, device 0, function 0: Host bridge: PCI device 108e:a000 id "" Bus 0, device 1, function 0: PCI bridge: PCI device 108e:5000 BUS 0. secondary bus 0. subordinate bus 0. IO range [0x0000, 0x0fff] memory range [0x00000000, 0x000fffff] prefetchable memory range [0x00000000, 0x000fffff] id "" Bus 0, device 1, function 1: PCI bridge: PCI device 108e:5000 BUS 0. secondary bus 0. subordinate bus 0. IO range [0x0000, 0x0fff] memory range [0x00000000, 0x000fffff] prefetchable memory range [0x00000000, 0x000fffff] id "" Bus 0, device 2, function 0: VGA controller: PCI device 1234:1111 BAR0: 32 bit prefetchable memory at 0x00800000 [0x00ffffff]. id "" Bus 0, device 3, function 0: Bridge: PCI device 108e:1000 BAR0: 32 bit memory at 0x01000000 [0x01ffffff]. BAR1: 32 bit memory at 0x02000000 [0x027fffff]. id "" Bus 0, device 4, function 0: Ethernet controller: PCI device 10ec:8029 IRQ 0. BAR0: I/O at 0x0400 [0x04ff]. id "" Bus 0, device 5, function 0: IDE controller: PCI device 1095:0646 IRQ 1. BAR0: I/O at 0x0500 [0x0507]. BAR1: I/O at 0x0580 [0x0583]. BAR2: I/O at 0x0600 [0x0607]. BAR3: I/O at 0x0680 [0x0683]. BAR4: I/O at 0x0700 [0x070f]. id ""